OM8373 datasheet(41/108 Pages) PHILIPS

41 / 108 page

2004 Jan 15

Philips Semiconductors

Tentative Device Speciﬁcation

TV signal processor-Closed Caption

decoder with embedded

µ-Controller

OM8373; OM8378

MMR MAP

ADD

R/W

Names

BIT7

BIT6

BIT5

BIT4

BIT3

BIT2

BIT1

BIT0

87F0

R/W

Display Control

SRC<3>

SRC<2>

SRC<1>

SRC<0>

SMTH

Reserved

MOD<1>

MOD<0>

87F1

R/W

Text

Position

Vertical

VPOL

HPOL

VOL<5>

VOL<4>

VOL<3>

VOL<2>

VOL<1>

VOL<0>

87F2

R/W

Text Area Start

HOP<1>

HOP<0>

TAS<5>

TAS<4>

TAS<3>

TAS<2>

TAS<1>

TAS<0>

87F3

R/W

Fringing Control

FRC<3>

FRC<2>

FRC<1>

FRC<0>

FRDN

FRDE

FRDS

FRDW

87F4

R/W

Text Area End

VOR<1>

VOR<0>

TAE<5>

TAE<4>

TAE<3>

TAE<2>

TAE<1>

TAE<0>

87F5

R/W

Scroll Area

SSH<3>

SSH<2>

SSH<1>

SSH<0>

SSP<3>

SSP<2>

SSP<1>

SSP<0>

87F6

R/W

Scroll Range

SPS<3>

SPS<2>

SPS<1>

SPS<0>

STS<3>

STS<2>

STS<1>

STS<0>

87F7

R/W

VDS Polarity

VDSPOL

-------

87F8

Status read

BUSY

FIELD

SCON

FLR

SCR<3>

SCR<2>

SCR<1>

SCR<0>

87F8

Status write

SCON

FLR

SCR<3>

SCR<2>

SCR<1>

SCR<0>

87FC

R/W

H-Sync. Delay

HSD<6>

HSD<5>

HSD<4>

HSD<3>

HSD<1>

HSD<0>

87FD

R/W

V-Sync. Delay

VSD<6>

VSD<5>

VSD<4>

VSD<3>

VSD<2>

VSD<1>

VSD<0>

87FE

R/W

Top Scroll Line

SCL<4>

SCL<3>

SCL<2>

SCL<1>

SCL<0>

87FF

R/W

Conﬁguration

VDEL<2>

VDEL<1>

VDEL<0>

TXT/V

Table 20 MMR Memory Map

OM8373 Datasheet(PDF) 41 Page - NXP Semiconductors

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