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CS47L85 Datasheet(PDF) 271 Page - Cirrus Logic

Part # CS47L85
Description  Low-Power Smart Codec with Seven DSP Cores, Voice and Media Enhancement, and Integrated Sensor Hub
PDF  370 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS47L85 Datasheet(HTML) 271 Page - Cirrus Logic

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CS47L85
Rev 4.3
271
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0
EVENT1_NOT_E
MPTY_STS1
0
R6294
(1896h)
IRQ1_Raw
_Status_23
7
EVENT8_FULL_
STS1
0
Event Log n FIFO Full status
0 = FIFO Not Full
1 = FIFO Full
6
EVENT7_FULL_
STS1
0
5
EVENT6_FULL_
STS1
0
4
EVENT5_FULL_
STS1
0
3
EVENT4_FULL_
STS1
0
2
EVENT3_FULL_
STS1
0
1
EVENT2_FULL_
STS1
0
0
EVENT1_FULL_
STS1
0
R6295
(1897h)
IRQ1_Raw
_Status_24
7
EVENT8_WMAR
K_STS1
0
Event Log n FIFO Watermark status
0 = FIFO Watermark not reached
1 = FIFO Watermark reached
6
EVENT7_WMAR
K_STS1
0
5
EVENT6_WMAR
K_STS1
0
4
EVENT5_WMAR
K_STS1
0
3
EVENT4_WMAR
K_STS1
0
2
EVENT3_WMAR
K_STS1
0
1
EVENT2_WMAR
K_STS1
0
0
EVENT1_WMAR
K_STS1
0
R6296
(1898h)
IRQ1_Raw
_Status_25
6
DSP7_DMA_STS
1
0
DSPn DMA status
0 = Normal
1 = All enabled WDMA buffers filled, and
all enabled RDMA buffers emptied
5
DSP6_DMA_STS
1
00
4
DSP5_DMA_STS
1
00
3
DSP4_DMA_STS
1
00
2
DSP3_DMA_STS
1
00
1
DSP2_DMA_STS
1
00
0
DSP1_DMA_STS
1
00
R6301
(189Dh)
IRQ1_Raw
_Status_30
6
DSP7_BUSY_ST
S1
0
DSPn Busy status
0 = DSP Idle
1 = DSP Busy
5
DSP6_BUSY_ST
S1
0
4
DSP5_BUSY_ST
S1
0
3
DSP4_BUSY_ST
S1
0
2
DSP3_BUSY_ST
S1
0



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