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ST25R3916 Datasheet(PDF) 79 Page - STMicroelectronics |
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ST25R3916 Datasheet(HTML) 79 Page - STMicroelectronics |
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79 / 157 page ![]() DS12484 Rev 4 79/157 ST25R3916/7 Application information 156 4.5.9 NFCIP-1 passive target definition register Register space: A Address: 08h Type: RW Table 32. NFCIP-1 passive target definition register Bit Name Default Function Comments 7 fdel3 0 PCD to PICC FDT compensation. Frame compensation defined as fdel<3:0>*1 / fc Valid for NFC-A CE mode – fdel = 0: Nominal FDT time in produced in logic. – fdel > 0: Shortens the FDT provided by logic. Due to signal processing delays fdel<3:0> = 2 is expected to be a good setting (best value dependents also on filter and antenna). 6 fdel2 0 5 fdel1 0 4 fdel0 0 3 d_ac_ap2p 0 0: Enable AP2P frame recognition 1: Disable AP2P frame recognition - 2 d_212/424_1r 0 0: Enable automatic SENSF_RES 1: Disable automatic SENSF_RES Disables the automatic responses in passive target mode, and completely operates via FIFO. 1 RFU 0 RFU 0 d_106_ac_a 0 0: Enable automatic anti-collision in NFC-A 1: Disable automatic anti-collision in NFC-A |
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