ST25R3916 datasheet(97/157 Pages) STMICROELECTRONICS

97 / 157 page

DS12484 Rev 4

97/157

ST25R3916/7

Application information

156

4.5.32

Mask error and wake-up interrupt register

Address: 18h

Type: RW

4.5.33

Mask passive target interrupt register

Address: 19h

Type: RW

Table 60. Mask error and wake-up interrupt register

Bit

Name

Default

Function

Comments

M_crc

1: Mask IRQ due to CRC error

M_par

1: Mask IRQ due to parity error

M_err2

1: Mask IRQ due to soft framing error

M_err1

1: Mask IRQ due to hard framing error

M_wt

1: Mask IRQ due to wake-up timer interrupt

M_wam

1: Mask Wake-up IRQ due to amplitude measurement

M_wph

1: Mask Wake-up IRQ due to phase measurement.

M_wcap

1: Mask Wake-up IRQ due to capacitance measurement

Table 61. Mask passive target interrupt register

Bit

Name

Default

Function

Comments

M_ppon2

1: Mask IRQ from PPON2 field on waiting timer

M_sl_wl

1: Mask IRQ for Passive target slot number water level

M_apon

1: Mask IRQ due to Active PP Field on event

M_rxe_pta

1: Mask IRQ due to end of receive when the device is

handling the response

M_wu_f

1: Mask IRQ NFC 212/424 kb/s passive target active

2RFU

M_wu_a*

1: Mask IRQ NFC 106 kb/s passive target Active*

M_wu_a

1: Mask IRQ NFC 106 kb/s passive target Active

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