ST25R3916 datasheet(95/157 Pages) STMICROELECTRONICS

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DS12484 Rev 4

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ST25R3916/7

Application information

156

4.5.28

Squelch timer register

Address: 0Fh

Type: RW

4.5.29

NFC field on guard timer register

Address: 15h

Type: RW

Table 56. Squelch timer register

Bit

Name

Default

Function

Comments

7sqt7

Squelch Timer

Step, Range: same as Mask

receive timer register, including

mrt_step selection

Squelch is enabled ~20 μs after the end of

reader data transmission

– sqt<7:0> > 5:

Squelch stops after the time defined by

sqt<7:0>. Gain reduction due to squelch is

locked and used as a starting point for AGC.

–Sqt<7:0> ≤ 5 or sqt<7:0> ≥ mrt<7:0>:

Squelch is enabled until the MRT expires.

6sqt6

5sqt5

4sqt4

3sqt3

2sqt2

1sqt1

0sqt0

Table 57. NFC field on guard timer register

Bit

Name

Default

Function

Comments

7nfc_gt7

NFC field on guard timer

Step: 2048 / fc (151 μs)

Range: 38.66 ms

Used by NFC field on commands.

The value nfc_gt<7:0> is added to the initial

75 μs in TIRFG and TARFG.

Set to 33 for TIRFG (75 μs + 4.984 ms= 5.06 ms)

Set to 0 for TARFG (75 μs + 0 ms = 75 μs)

6nfc_gt6

5nfc_gt5

4nfc_gt4

3nfc_gt3

2nfc_gt2

1nfc_gt1

0nfc_gt0

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