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and enters soft start once the short circuit is cleared. Note there is a 65 ns (typ.) response time to trigger

hard-short OCP.

8.3.6.3 Under Voltage Lock-Out (UVLO)

Start-up and shutdown are controlled by the both EN/UVLO pin and VCC pin. For the device to remain in

shutdown mode, apply a voltage below ENUVLO to the EN/UVLO pin. In shutdown mode, the quiescent current is

less than 0.8 µA (typical). If EN/UVLO pin sees a voltage higher than ENUVLO, but VIN is still below VCCUVLO, the

SW node is inactive. Once the VIN is above VCCUVLO, the chip begins to switch normally, provided the EN/UVLO

voltage is above 1.5 V.

There are three ways to enable the device operation. The simplest way is to connect the EN/UVLO pin to

VCC pin, allowing self-start-up of the device when VCC pin voltage is above VCCUVLO level. However, many

applications benefit from an input UVLO level different than that provided internal UVLO. So another way is to

employ an enable resistor divider network as shown in Figure below, which establishes a programmable UVLO

threshold. The thrid way is to connect an external logic output to drive this pin, allowing user-defined system

power sequencing.

EN/UVLO pin has a 5 µs (typical) glitch filter to help avoid false turn-on and turn-off due to noise coupling. It also

comes with an internal pull down design to ensure the device is in shutdown mode when the pin is left floating.

Programmable UVLO using EN/UVLO pin

ENT

ENB

GND

EN/UVLO

Resistor values can be calculated using Equation below, where the input turn on threshold VIN_UVLO is the

desired typical start-up input voltage, ENUVLO is 1.5 V typical, and RENT and RENB are in Ω.

VIN_UVLO= 1+RENTRENB ×ENUVLO

(3)

8.3.6.4 Thermal Shut Down (TSD)

Thermal shutdown prevents the device from reaching extreme junction temperatures by turning off the internal

switches when the IC junction temperature exceeds 180°C (typical). In TSD, the switching stops immediately

to prevent the internal MOSFETs from failing in either high ambient temperature operation conditions or due to

self-heating from high switching current. To recover from thermal shut down condition, the junction temperature

must be below the overtemperature protection falling threshold. When the junction temperature falls below

147°C (typical), the power FET switching is enabled.

8.4 Device Functional Modes

The functional modes of the device are divided into start-up, operating, and off-mode.

8.4.1 Start-Up Mode

When VCC pin voltage ramps up to VCCUVLO , and EN/UVLO pin voltage is over ENUVLO the internal oscillator

starts operating. The output stage begins switching but the amplitude of the drain signals at SW1 and SW2 have

not reached its full maximum yet.

8.4.1.1 Soft-Start

SN6507-Q1 device supports soft-start feature. Upon power up or when EN/UVLO pin transitions from Low to

High, the gate drive of the output powerFET is gradually increased over a period of time from 0 V to full driving

SN6507-Q1

SLLSFM1 – SEPTEMBER 2022

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