ADXL314 datasheet(11/27 Pages) AD

11 / 27 page

Data Sheet

ADXL314

THEORY OF OPERATION

analog.com

Rev. A | 11 of 27

Current consumption at the sub 8 Hz data rates used in this mode

is typically 30 µA for a VS of 2.5 V.

Standby Mode

For even lower power operation, standby mode can be used. In

standby mode, current consumption is reduced to 0.1 µA (typical).

In this mode, no measurements are made. Standby mode is

entered by clearing the measure bit (Bit 3) in the POWER_CTL

preserves the contents of the FIFO.

FIFO BUFFER

The ADXL314 contains patented technology for an embedded

memory management system with a 32-level FIFO buffer that

can be used to minimize host processor burden. This buffer has

four modes: bypass, FIFO, stream, and trigger. Each mode can

be selected by setting the FIFO_MODE bits (Bits[D7:D6]) in the

FIFO_CTL register (Address 0x38; see Table 10).

Table 10. FIFO Modes (FIFO_CTL Register, Address 0x38)

Setting

FIFO

Mode

Description

Bypass

The FIFO buffer is bypassed.

FIFO

The FIFO buffer collects up to 32 samples and then

stops collecting data. The FIFO buffer only collects

new data when the buffer is not full.

Stream

The FIFO buffer holds the last 32 samples. When

the FIFO buffer is full, the oldest data is overwritten

with newer data.

Trigger

The FIFO buffer holds the last samples before the

trigger event and continues to collect data until full.

New data is collected only when the FIFO buffer is

not full.

For an in-depth description of the FIFO buffer and FIFO modes, see

the AN-1025 Application Note, Utilization of the First In, First Out

(FIFO) Buffer in Analog Devices, Inc., Digital Accelerometers.

Bypass Mode

In bypass mode, the FIFO buffer is not operational and, therefore,

remains empty. Data is erased when switching from other FIFO

modes to bypass mode.

FIFO Mode

In FIFO mode, data from measurements of the x-axis, y-axis, and

z-axis is stored in the FIFO buffer. When the number of samples

in the FIFO buffer equals the level specified by the samples bits

of the FIFO_CTL register (Address 0x38), the watermark interrupt

is set (see the Watermark section). The FIFO buffer continues to

accumulate samples until it is full (32 samples from measurements

of the x-axis, y-axis, and z-axis) and then stops collecting data.

After the FIFO buffer stops collecting data, the device continues to

operate; therefore, features such as shock detection can be used

after the FIFO buffer is full. The watermark interrupt bit remains set

until the number of samples in the FIFO buffer is less than the value

stored in the samples bits of the FIFO_CTL register.

Stream Mode

In stream mode, data from measurements of the x-axis, y-axis, and

z-axis is stored in the FIFO buffer. When the number of samples

in the FIFO buffer equals the level specified by the samples bits

of the FIFO_CTL register (Address 0x38), the watermark interrupt

is set (see the Watermark section). The FIFO buffer continues to

accumulate samples; the buffer stores the latest 32 samples from

measurements of the x-axis, y-axis, and z-axis, discarding older

data as new data arrives. The watermark interrupt bit remains set

until the number of samples in the FIFO buffer is less than the value

stored in the samples bits of the FIFO_CTL register.

Trigger Mode

In trigger mode, the FIFO buffer accumulates samples, storing the

latest 32 samples from measurements of the x-axis, y-axis, and

z-axis. After a trigger event occurs, an interrupt is sent to the INT1

or INT2 pin (determined by the trigger bit in the FIFO_CTL register),

and the FIFO_TRIG bit (Bit D7) is set in the FIFO_STATUS register

(Address 0x39).

The FIFO buffer keeps the last n samples (n is the value specified

by the samples bits in the FIFO_CTL register) and then operates

in FIFO mode, collecting new samples only when the FIFO buffer

is not full. A delay of at least 5 µs must elapse between the

occurrence of the trigger event and the start of data read back

from the FIFO buffer to allow the buffer to discard and retain the

necessary samples.

Additional trigger events cannot be recognized until the device is

reset to trigger mode. To reset the device to trigger mode, take the

following steps:

1. If desired, read data from the FIFO buffer (see the Retrieving

Data from the FIFO Buffer section). Before resetting the device

to trigger mode, read back the FIFO data; placing the device

into bypass mode clears the FIFO buffer.

2. Configure the device for bypass mode by setting Bits[D7:D6] at

Address 0x38 to 00.

3. Configure the device for trigger mode by setting Bits[D7:D6] at

Address 0x38 to 11.

Retrieving Data from the FIFO Buffer

When the FIFO buffer operates in FIFO, stream, or trigger mode,

FIFO data can be read from the data registers (Address 0x32 to

Address 0x37). Each time data is read from the FIFO buffer, the

oldest x-axis, y-axis, and z-axis data is moved into the DATAXx,

DATAYx, and DATAZx registers.

ADXL314 Datasheet(PDF) 11 Page - Analog Devices

ADXL314 Datasheet(HTML) 11 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

Datasheet Download

Link URL