S12ECT16B8CV2 datasheet(134/152 Pages) NXP

134 / 152 page

MC9S12XDP512 Device User Guide — V01.12

A.5.1.5 Pseudo Stop and Wait Recovery

The recovery from Pseudo STOP and Wait are essentially the same since the oscillator was not stopped in

both modes. The controller can be woken up by internal or external interrupts. After twrs the CPU starts

fetching the interrupt vector.

A.5.2 Oscillator

The device features an internal low-power loop controlled Pierce oscillator and a full swing Pierce

oscillator/external clock mode. The selection of loop controlled Pierce oscillator or full swing Pierce

oscillator/external clock depends on the XCLKS signal which is sampled during reset. Before asserting

the oscillator to the internal system clocks the quality of the oscillation is checked for each start from either

power-on, STOP or oscillator fail. tCQOUT specifies the maximum time before switching to the internal

self clock mode after POR or STOP if a proper oscillation is not detected. The quality check also

determines the minimum oscillator start-up time tUPOSC. The device also features a clock monitor. A

Clock Monitor Failure is asserted if the frequency of the incoming clock signal is below the Assert

Frequency fCMFA.

Table A-18 Oscillator Characteristics

Conditions are shown in Table A-1 unless otherwise noted

Num

Rating

Symbol

Min

Typ

Max

Unit

C Crystal oscillator range (loop controlled Pierce)

fOSC

4.0

MHz

C Crystal oscillator range (full swing Pierce) 1,2

NOTES:

1. Depending on the crystal a damping series resistor might be necessary

2. XCLKS =0 during reset

fOSC

0.5

MHz

P Startup Current

iOSC

100

µA

C Oscillator start-up time (loop controlled Pierce)

tUPOSC

TBD3

3. fosc = 4MHz, C = 22pF.

504

4. Maximum value is for extreme cases using high Q, low frequency crystals

D Clock Quality check time-out

tCQOUT

0.45

2.5

P Clock Monitor Failure Assert Frequency

fCMFA

100

200

ΚΗz

P External square wave input frequency

fEXT

0.5

TBD

MHz

D External square wave pulse width low

tEXTL

TBD

D External square wave pulse width high

tEXTH

TBD

D External square wave rise time

tEXTR

TBD

D External square wave fall time

tEXTF

TBD

D Input Capacitance (EXTAL, XTAL inputs)

CIN

TBD

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

S12ECT16B8CV2 Datasheet(PDF) 134 Page - NXP Semiconductors

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