S12ECT16B8CV2 datasheet(129/152 Pages) NXP

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MC9S12XDP512 Device User Guide V01.12

A.3.2 NVM Reliability

The reliability of the NVM blocks is guaranteed by stress test during qualification, constant process

monitors and burn-in to screen early life failures.

The failure rates for data retention and program/erase cycling are specified at the operating conditions

noted.

The program/erase cycle count on the sector is incremented every time a sector or mass erase event is

executed.

NOTE:

All values shown in Table A-16 are target values and subject to further extensive

characterization.

3. Maximum Erase and Programming times are achieved under particular combinations of fNVMOP and bus frequency fbus.

Refer to formulae in Sections A.3.1.1 - A.3.1.4 for guidance.

4. Burst Programming operations are not applicable to EEPROM

5. Minimum Erase times are achieved under maximum NVM operating frequency fNVMOP.

6. Minimum time, if first word in the array is not blank

7. Maximum time to complete check on an erased block

Table A-16 NVM Reliability Characteristics

Conditions are shown in Table A-4 unless otherwise noted

Num C

Rating

Symbol

Min

Typ

Max

Unit

Data Retention at an average junction temperature of

TJavg = 70°C

tNVMRET

Years

C Flash number of Program/Erase cycles

nFLPE

1000

10,000

Cycles

EEPROM number of Program/Erase cycles

(–40

°C

≤ T

J ≤ 0°C)

nEEPE

10,000

Cycles

EEPROM number of Program/Erase cycles

°C < T

J ≤ 140°C)

nEEPE

100,000

Cycles

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

S12ECT16B8CV2 Datasheet(PDF) 129 Page - NXP Semiconductors

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