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M66596 Datasheet(PDF) 36 Page - Renesas Technology Corp |
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M66596 Datasheet(HTML) 36 Page - Renesas Technology Corp |
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36 / 133 page ![]() M66596FP/WG rev .1.00 2006.3.14 page 34 of 127 2.8 SOF control register SOF pin configuration register [SOFCFG] <Address: 3CH> 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SOFM ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0 - - 0 0 - - 0 ? ? ? ? ? ? ? ? Bit Name Function S/W H/W Note 15-4 Nothing is placed here. These should be fixed at “0”. 3-2 SOFM SOF pin function setting This selects the SOF pulse output mode. 00: SOF pulse output disabled 01: SOF pulse output in units of 1 ms 10: uSOF output in units of 125 us 11: Reserved R/W R 3.10.1 *1),*2) 1-0 Nothing is placed here. These should be fixed at “0”. <<Notes>> *1) With Full-Speed operation, (when “HSE=0” has been set, or the RHST bit indicates “RHST=0” as the result of the reset handshake), “SOFM=10” should not be set. *2) This bit should be set after a reset handshake has been completed, or when recovering from the low-power sleep state, and should not be changed during subsequent USB communication. |
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