M66596 datasheet(61/133 Pages) RENESAS

61 / 133 page

M66596FP/WG

rev .1.00

2006.3.14

page 59 of 127

3.1.8.6 Starting the internal clock

(From the clock stop state to the normal operating state : with “ATCKM=0”)

The timing diagram from the clock stop state to the normal operation is shown in Figure 3.10. The diagram is in

the case of the auto clock supply function is disabled ("ATCKM=0"). When the auto clock supply function is disabled,

(1) The controller detects the resume on a USB bus or attachment of the USB cable, and the INT_N pin is

asserted.

(2) When the resume is detected, the controller automatically enables the oscillation buffer. "XCKE=1(H/W)"

When attachment of USB cable is detected, software enables the oscillation buffer. "XCKE=1(S/W)"

(3) The software waits for oscillation to stabilize. *1)

(The oscillation stabilization time varies depending

on the oscillator.)

(4) The software enables the reference clock suppliance

"RCKE=1", "PLLC=1"

and the PLL operation

(5) The software waits for the PLL to lock.

(A waiting time of at least 8.3 us is necessary.)

(6) The software enables the internal clock suppliance.

"SCKE=1"

(7) Software performs depending on the interrupt factor, resume or attachment.

*1) When it returns with a USB bus reset signal from the suspend state, it is necessary to return to the normal

operation state less than 3ms and the controller start a reset handshake protocol. For this reason, when an

auto clock supply function is disabled, it is necessary to perform a processings to oscillation stability waiting

and clock supply by software within 3ms.

XCKE

Resume :H/W

VBUS chage :S/W

RCKE(H/W)

PLLC(H/W)

SCKE(H/W)

(3)

Clock stop

recovery

INT_N

Event

(1),(2)

(6)

(5) min 8.3us

(4)

Figure 3.10 Recovery control timing from the clock stop state with “ATCKM=0”

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