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TMPR4925 Datasheet(PDF) 341 Page - Toshiba Semiconductor |
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TMPR4925 Datasheet(HTML) 341 Page - Toshiba Semiconductor |
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341 / 590 page ![]() Chapter 10 PCI Controller 10-79 10.4.51 P2G I/O Space G-Bus Base Address Register (P2GIOGBASE) 0xD198 31 16 BA[31:16] R/W : Type 0x0000 : Initial value 15 8 7 0 BA[15:8] Reserved R/W : Type 0x00 : Initial value Bits Mnemonic Field Name Description 31:8 BA[31:8] Memory Space Base Address 2 Base Address 2 (Initial value: 0x0000_00, R/W) Sets the G-Bus base bus address of the I/O Space for target access. Can set the base address from 256 B to 64 KB. 7:0 Reserved Figure 10.4.51 P2G I/O Space G-Bus Base Address Register |
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