TMPR4925 datasheet(467/590 Pages) TOSHIBA

467 / 590 page

Chapter 15 Interrupt Controller

15-17

15.4.7

Interrupt Level Register 3 (IRLVL3)

0xF61C

Reserved

IL23

Reserved

IL22

R/W

: Type

000

: Initial value

Reserved

IL7

Reserved

IL6

R/W

: Type

000

: Initial value

Bits

Mnemonic

Field Name

Explanation

31:27



Reserved



26:24

IL23

Interrupt Level 23

Interrupt Level of INT[23] (Initial value: 000, R/W)

These bits specify the interrupt level of TMR[2].

000: Interrupt level 0 (Interrupt disable)

001: Interrupt level 1

010: Interrupt level 2

011: Interrupt level 3

100: Interrupt level 4

101: Interrupt level 5

110: Interrupt level 6

111: Interrupt level 7

23:19



Reserved



18:16

IL22

Interrupt Level 22

Interrupt Level of INT[22] (Initial value: 000, R/W)

These bits specify the interrupt level of TMR[1].

000: Interrupt level 0 (Interrupt disable)

001: Interrupt level 1

010: Interrupt level 2

011: Interrupt level 3

100: Interrupt level 4

101: Interrupt level 5

110: Interrupt level 6

111: Interrupt level 7

15:11



Reserved



10:8

IL7

Interrupt level 7

Interrupt Level of INT[7] (Initial value: 000, R/W)

These bits specify the interrupt level of external INT[5] interrupts.

000: Interrupt level 0 (Interrupt disabled)

001: Interrupt level 1

010: Interrupt level 2

011: Interrupt level 3

100: Interrupt level 4

101: Interrupt level 5

110: Interrupt level 6

111: Interrupt level 7

7:3



Reserved



2:0

IL6

Interrupt level 6

Interrupt Level of INT[6] (Initial value: 000, R/W)

These bits specify the interrupt level of external INT[4] interrupts.

000: Interrupt level 0 (Interrupt disabled)

001: Interrupt level 1

010: Interrupt level 2

011: Interrupt level 3

100: Interrupt level 4

101: Interrupt level 5

110: Interrupt level 6

111: Interrupt level 7

Figure 15.4.7 Interrupt Level Register 3

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