TMPR4925 datasheet(464/590 Pages) TOSHIBA

464 / 590 page

Chapter 15 Interrupt Controller

15-14

15.4.4

Interrupt Level Register 0 (IRLVL0)

0xF610

Reserved

IL17

Reserved

IL16

R/W

: Type

000

: Initial value

Reserved

IL1

Reserved

R/W

: Type

000

: Initial value

Bits

Mnemonic

Field Name

Explanation

31:27



Reserved



26:24

IL17

Interrupt Level 17

Interrupt Level of INT[17] (Initial value: 000, R/W)

These bits specify the interrupt level of DMA[3] interrupts.

000: Interrupt level 0 (Interrupt disabled)

001: Interrupt level 1

010: Interrupt level 2

011: Interrupt level 3

100: Interrupt level 4

101: Interrupt level 5

110: Interrupt level 6

111: Interrupt level 7

23:19



Reserved



18:16

IL16

Interrupt Level 16

Interrupt Level of INT[16] (Initial value: 000, R/W)

These bits specify the interrupt level of DMA[2] interrupts.

000: Interrupt level 0 (Interrupt disable)

001: Interrupt level 1

010: Interrupt level 2

011: Interrupt level 3

100: Interrupt level 4

101: Interrupt level 5

110: Interrupt level 6

111: Interrupt level 7

15:11



Reserved



10:8

IL1

Interrupt Level 1

Interrupt Level of INT[1] (Initial value: 000, R/W)

These bits specify the interrupt level for TX49 Write Timeout Error interrupts.

000: Interrupt level 0 (Interrupt disable)

001: Interrupt level 1

010: Interrupt level 2

011: Interrupt level 3

100: Interrupt level 4

101: Interrupt level 5

110: Interrupt level 6

111: Interrupt level 7

7:0



Reserved



Figure 15.4.4 Interrupt Level Register 0

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