TMPR4925 datasheet(115/590 Pages) TOSHIBA

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Chapter 7 External Bus Controller

7-5

7.3.3

Address Mapping

Each of the eight channels can use the Base Address field (EBBAR.BA[31:20]) and the Channel Size

field (EBCCRn.CS[3:0]) of the External Bus Channel Control Register to map to any physical address.

A channel is selected when the following equation becomes True.

paddr[31:20] & !Mask[31:20] == BA[31:20] & !Mask[31:20]

In the above equation, paddr represents the accessed physical address, Mask[31:20] represents the

address mask value selected from Table 7.3.1 from the Channel Size, the ampersand (&) represents the

AND operation, and the exclamation mark (!) represents the Logical NOT for each bit.

Operation is indeterminate when either multiple channels are selected simultaneously, or a channel is

selected simultaneously with the SDRAM Controller or PCI Controller.

Table 7.3.2 Address Mask

CS[3:0]

Channel Size

Address Mask[31:20]

0000

1 MB

0000_0000_0000

0001

2 MB

0000_0000_0001

0010

4 MB

0000_0000_0011

0011

8 MB

0000_0000_0111

0100

16 MB

0000_0000_1111

0101

32 MB

0000_0001_1111

0110

64 MB

0000_0011_1111

0111

128 MB

0000_0111_1111

1000

256 MB

0000_1111_1111

1001

512 MB

0001_1111_1111

1010

1 GB

0011_1111_1111

1011

Reserved

1100

Reserved

1101

Reserved

1110

Reserved

1111

Reserved

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