ES9033 datasheet(15/103 Pages) ESS

15 / 103 page

0.3.1

ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800

ES9033 Datasheet Information

Digital Features

Digital Signal Path

SABRE DAC DIGITAL PATH

DSD/DoP

TDM/I2S

De-emphasis

Filter

Volume

Control &

Automute

THD

Compensation

16X IIR

Filter

8x Oversampling Filter

2x OSF

Bypass

4x OSF

Noise Shaped

Modulators

(NSMOD)

DRE

+18dB

Gain

Bypass

Figure 5 - Digital signal path block diagram

GPIO Configuration

GPIO_CONFIG

Function

I/O Direction

1’b0

Output

1’b0

Output

1’b1

Output

128 FS Block

Output

Interrupt Output

Output

Mute all channel

Input

System mode Control

Input

Reserved

Output

CLK_VALID flag

Output

PWM1

Output

PWM2

Output

PWM3

Output

Volume min

Output

Automute status

Output

Soft Ramp finished

Output

1’b0

Output

Table 4 – Standard GPIO Functions

For GPIO_CONFIG 12, 13, 14:

Register 26[0] (GPIO_SEL) selects which channel determines the flag status when the corresponding bits in Register 25[7:2] are set to 1’b0.

See register listing for more detail.

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