ES9033 datasheet(4/103 Pages) ESS

4 / 103 page

0.3.1

ES9033 Datasheet Information

ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM

List of Figures

Figure 1 - ES9033 Block Diagram ....................................................................................................................................................................................6

Figure 2 - 28 QFN pinout..................................................................................................................................................................................................7

Figure 3 - Hardware mode pin configurations...................................................................................................................................................................9

Figure 4 - Hardware mode startup sequence .................................................................................................................................................................13

Figure 5 - Digital signal path block diagram....................................................................................................................................................................15

Figure 6 - DSD format.....................................................................................................................................................................................................18

Figure 7 - ES9033 Clock Distribution..............................................................................................................................................................................25

Figure 8 - Audio interface timing.....................................................................................................................................................................................31

Figure 9 - Functional Block Diagram of ES9033 APLL...................................................................................................................................................32

Figure 10 - Recommended power-up sequence ............................................................................................................................................................37

Figure 11 - Recommended power-down sequence........................................................................................................................................................38

Figure 12 - I2C Slave Control Interface Timing ..............................................................................................................................................................40

Figure 13 - I2C single byte R/W......................................................................................................................................................................................41

Figure 14 - SPI single byte write.....................................................................................................................................................................................41

Figure 15 - SPI single byte Read....................................................................................................................................................................................42

Figure 16 - SPI multi-byte read.......................................................................................................................................................................................42

Figure 17 – Hardware mode reference schematic..........................................................................................................................................................94

Figure 18 – Software mode reference schematic ...........................................................................................................................................................95

Figure 19 – QFN package dimensions ...........................................................................................................................................................................96

Figure 20 – 28 QFN top view markings ..........................................................................................................................................................................97

Figure 21 – IR/Convection Reflow Profile (IPC/JEDEC J-STD-020D.1).........................................................................................................................98

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