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ES9033 Datasheet(PDF) 54 Page - ESS Technology,Inc

Part # ES9033
Description  32-bit High-Performance 2-Channel DAC with Line Drivers
PDF  103 Pages
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Manufacturer  ESS [ESS Technology,Inc]
Direct Link  http://www.esstech.com
Logo ESS - ESS Technology,Inc

ES9033 Datasheet(HTML) 54 Page - ESS Technology,Inc

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ES9033 Datasheet Information
ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM
54
Register 15: ANALOG CTRL CONFIG
Bits
[7]
[6]
[5]
[4:2]
[1]
[0]
Default
1’d0
1’b1
1’b1
3’b000
1’b0
1’b0
Bits
Mnemonic
Description
[7]
RESERVED
NA
[6]
AMP_PDB_ON_SS
DAC amp power control for soft ramp on normal mute.
•
1’b0: When soft ramped to ground during normal
mute, keeps DAC AMP on
•
1’b1: When soft ramped to ground during normal mute
allow DAC AMP to shut down for power saving
(default)
“normal mute” includes: 54utomate, mute by register, mute by
GPIO
[5]
AMP_PDB_CLK_INVALID
DAC amp power control for soft ramp on abnormal mute.
•
1’b0: When soft ramped to ground during abnormal
mute, keeps DAC AMP on
•
1’b1: When soft ramped to ground during abnormal
mute allow DAC AMP to shut down for power saving
(default)
“abnormal mute” includes: PLL unlock, BCK_WS ratio failed
[4:2]
RESERVED
NA
[1]
LP_DAC_REG
Set the low power mode for DAC regulator (Left)
•
1’b0: Normal Mode
•
1’b1: Low power mode enabled
[0]
EN_FCB
Enable the fast charge for VREF_L AND VREF_R
•
1’b0: Enabled (default)
•
1’b1: Disable fast charge
Register 16: LDRV CTRL
Bits
[7]
[6]
[5:0]
Default
1’b0
1’b0
6’b000011
Bits
Mnemonic
Description
[7]
ENB_OCP_LDRV_CH2
Line driver over current protection
•
1’b0: Enable
•
1’b1: Disable
[6]
ENB_OCP_LDRV_CH1
Line driver over current protection
•
1’b0: Enable
•
1’b1: Disable
[5:0]
RESERVED
NA



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