Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

ES9033 Datasheet(PDF) 43 Page - ESS Technology,Inc

Part # ES9033
Description  32-bit High-Performance 2-Channel DAC with Line Drivers
PDF  103 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ESS [ESS Technology,Inc]
Direct Link  http://www.esstech.com
Logo ESS - ESS Technology,Inc

ES9033 Datasheet(HTML) 43 Page - ESS Technology,Inc

Back Button ES9033 Datasheet HTML 39Page - ESS Technology,Inc ES9033 Datasheet HTML 40Page - ESS Technology,Inc ES9033 Datasheet HTML 41Page - ESS Technology,Inc ES9033 Datasheet HTML 42Page - ESS Technology,Inc ES9033 Datasheet HTML 43Page - ESS Technology,Inc ES9033 Datasheet HTML 44Page - ESS Technology,Inc ES9033 Datasheet HTML 45Page - ESS Technology,Inc ES9033 Datasheet HTML 46Page - ESS Technology,Inc ES9033 Datasheet HTML 47Page - ESS Technology,Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 43 / 103 page
background image
0.3.1
ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800
ES9033 Datasheet Information
43
Register Map
Addr
(Hex)
Addr
(Dec)
Register
7
6
5
4
3
2
1
0
0x0
0
SYSTEM CONFIG
SOFT_RESET
ENABLE_2X_
MODE
ENABLE_AN
ALOG_DAC_
CH2
ENABLE_AN
ALOG_DAC_
CH1
ENABLE_NS
MOD
ENABLE_DA
C
AMP_MODE
_REG
RESERVED
0x1
1
SYS MODE CONFIG
RESERVED
ENABLE_DO
P_DECODE
ENABLE_DS
D_DECODE
ENABLE_TD
M_DECODE
0x2
2
DAC CLOCK CONFIG
RESERVED
SELECT_IDA
C_HALF
SELECT_IDAC_NUM
0x3
3
MASTER CLOCK CONFIG
SELECT_ME
NC_HALF
SELECT_MENC_NUM
0x4
4
CP CLOCK DIV
CP_CLK_DIV
0x5
5
RESERVED
RESERVED
0x6
6
RESERVED
RESERVED
0x7
7
RESERVED
RESERVED
0x8
8
RESERVED
RESERVED
0x9
9
INTERRUPT MASK P
SOFT_RAMP
_CH2_MASK
P
SOFT_RAMP
_CH1_MASK
P
DRE_FLAG_C
H2_MASKP
DRE_FLAG_C
H1_MASKP
AUTOMUTE
_FLAG_CH2_
MASKP
AUTOMUTE
_FLAG_CH1_
MASKP
VOL_MIN_C
H2_MASKP
VOL_MIN_C
H1_MASKP
0xA
10
INTERRUPT MASK P
INPUT_DATA_TYPE_MASKP
TDM_DATA_
VALID_FLAG
_MASKP
CLK_AVALID
_FLAG_MAS
KP
RWS_REFER
ENCE_COUN
TER_FULL_F
LAG_MASKP
BCK_WS_FAI
LED_FLAG_
MASKP
RESERVED
DOP_VALID_
MASKP
0xB
11
INTERRUPT MASK N
SOFT_RAMP
_CH2_MASK
N
SOFT_RAMP
_CH1_MASK
N
DRE_FLAG_C
H2_MASKN
DRE_FLAG_C
H1_MASKN
AUTOMUTE
_FLAG_CH2_
MASKN
AUTOMUTE
_FLAG_CH1_
MASKN
VOL_MIN_C
H2_MASKN
VOL_MIN_C
H1_MASKN
0xC
12
INTERRUPT MASK N
INPUT_DATA_TYPE_MASKN
TDM_DATA_
VALID_FLAG
_MASKN
CLK_AVALID
_FLAG_MAS
KN
RWS_REFER
ENCE_COUN
TER_FULL_F
LAG_MASKN
BCK_WS_FAI
LED_FLAG_
MASKN
RESERVED
DOP_VALID_
MASKN
0xD
13
INTERRUPT CLEAR
SOFT_RAMP
_CH2_CLEAR
SOFT_RAMP
_CH1_CLEAR
DRE_FLAG_C
H2_CLEAR
DRE_FLAG_C
H1_CLEAR
AUTOMUTE
_FLAG_CH2_
CLEAR
AUTOMUTE
_FLAG_CH1_
CLEAR
VOL_MIN_C
H2_CLEAR
VOL_MIN_C
H1_CLEAR
0xE
14
INTERRUPT CLEAR
INPUT_DATA_CLEAR
TDM_DATA_
VALID_CLEA
R
CLK_AVALID
_FLAG_CLEA
R
RWS_REFER
ENCE_COUN
TER_FULL_F
LAG_CLEAR
BCK_WS_FAI
LED_FLAG_C
LEAR
RESERVED
DOP_VALID_
CLEAR
0xF
15
ANALOG CTRL CONFIG
RESERVED
AMP_PDB_O
N_SS
AMP_PDB_C
LK_INVALID
RESERVED
LP_DAC_RE
G
EN_FCB
0x10
16
LDRV CTRL
ENB_OCP_L
DRV_CH2
ENB_OCP_L
DRV_CH1
RESERVED
0x11
17
RESERVED
RESERVED
0x12
18
RESERVED
RESERVED
0x13
19
ANALOG CONTROL
OVERRIDE2
TRIB_DAC_C
H2
TRIB_DAC_C
H1
RESERVED
0x14
20
RESERVED
RESERVED
0x15
21
RESERVED
RESERVED
0x16
22
RESERVED
RESERVED
0x17
23
RESERVED
RESERVED
0x18
24
GPIO CONFIG
INVERT_GPI
O1
GPIO1_WK_
EN
GPIO1_SDB
GPIO1_OE
GPIO1_CFG
0x19
25
GPIO CONFIG2
GPIO_OR_SS
_RAMP
GPIO_OR_V
OL_MIN
GPIO_OR_A
UTOMUTE
GPIO_AND_
SS_RAMP
GPIO_AND_
VOL_MIN
GPIO_AND_
AUTOMUTE
RESERVED
GPIO1_READ
0x1A
26
GPIO INPUT ENABLE
RESERVED
GPIO_AMP_
MODE
GPIO_SEL
0x1B
27
PWM1 COUNT
PWM1_COUNT
0x1C
28
PWM1 FREQUENCY
PWM1_FREQ
0x1D
29
PWM1 FREQUENCY
PWM1_FREQ
0x1E
30
PWM2 COUNT
PWM2_COUNT
0x1F
31
PWM2 FREQUENCY
PWM2_FREQ
0x20
32
PWM2 FREQUENCY
PWM2_FREQ
0x21
33
PWM3 COUNT
PWM3_COUNT
0x22
34
PWM3 FREQUENCY
PWM3_FREQ
0x23
35
PWM3 FREQUENCY
PWM3_FREQ
0x24
36
INPUT CONFIG
AUTO_FS_D
ETECT
DSD_NEGED
GE
DSD_MASTE
R_MODE
ENABLE_TD
M_MASTER_
MODE
ENABLE_PD
M
INPUT_SEL
AUTO_INPU
T_SELECT
0x25
37
MASTER MODE CONFIG
AUTO_FS_D
ETECT_BLOC
K_2XMODE
MASTER_BC
K_DIV1
MASTER_WS
_IDLE
MASTER_FRAME_LENGTH
MASTER_WS
_PULSE_MO
DE
MASTER_WS
_INVERT
MASTER_BC
K_INVERT
0x26
38
TDM CONFIG1
TDM_RESYN
C
MASTER_WS_SCALE
TDM_CH_NUM
0x27
39
TDM CONFIG2
TDM_LJ_MO
DE
TDM_VALID
_EDGE
TDM_VALID_PULSE_LEN
0x28
40
TDM CONFIG3
PDM_NEG_F
IRST
TDM_BIT_WIDTH
TDM_DATA_LATCH_ADJ



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com