EMC6D103 datasheet(47/92 Pages) SMSC

47 / 92 page

Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features

Datasheet

SMSC EMC6D103

Revision 0.3 (03-01-07)

DATASHEET

Note: Minimum RPM values shown use minimum guard time (88.88usec).

7.1.4.9

Detection of a Stalled Fan

There is a fan failure bit (TACHx) in the interrupt status register used to indicate that a slow or stalled

fan event has occurred. If the tach reading value exceeds the value programmed in the tach limit

Notes:

The reading register will be forced to FFFFh if a stalled event occurs (i.e., stalled event =no edges

detected.)

The reading register will be forced to either FFFFh or FFFEh if a slow fan event occurs. (i.e., slow

event: 0 < #edges < programmed #edges). If the control bit, SLOW, located in the TACHx Options

registers at offsets 90h - 93h, is set then FFFEh will be forced into the corresponding Tach Reading

The fan tachometer reading register stays at FFFFh in the event of a stalled fan. If the fan begins

to spin again, the tachometer logic will reset and latch the next valid reading into the tachometer

reading register.

7.1.4.10

Fan Interrupt Status Bits

The status bits for the fan events are in Interrupt Status Register 2 (42h). These bits are set when the

reading register is above the tachometer minimum and the Interrupt Enable 2 (Fan Tachs) register bits

are configured to enable Fan Tach events. No interrupt status bits are set for fan events (even if the

fan is stalled) if the associated tachometer minimum is set to FFFFh (registers 54h-5Bh).

Note: The Interrupt Enable 2 (Fan Tachs) register at offset 80h defaults to enabled for the individual

tachometer status events bits. The group Fan Tach INT# bit defaults to disabled. This bit needs

to be set if Fan Tach interrupts are to be generated on the external INT# pin.

See Figure 6.1 Interrupt Controlon page 26.

7.1.5

Linking Fan Tachometers to PWMs

The TACH/PWM Association Register at offset 81h is used to associate a Tachometer input with a

PWM output. This association has three purposes:

1. The auto fan control logic supports a feature called SpinUp Reduction. If SpinUp Reduction is

enabled (SUREN bit), the auto fan control logic will stop driving the PWM output high if the

associated TACH input is operating within normal parameters. (Note: SUREN bit is located in the

Configuration Register at offset 7Fh)

2. To measure the tachometer input in Mode 2, the tachometer logic must know when the associated

PWM is ‘ON’.

Table 7.5 Minimum RPM Detectable– With PWM Stretching

NUMBER OF EDGES

FOR DETECTION

MINIMUM RPM AT STRETCHED PULSE WIDTH

50MSE

100MSE

200MSE

400MSE

600MSE

800MSE

950MSE

2400

1200

600

300

200

150

126

1200

600

300

150

100

600

300

150

300

150

7538251916

EMC6D103 Datasheet(PDF) 47 Page - SMSC Corporation

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