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RT600 Datasheet(PDF) 18 Page - NXP Semiconductors |
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RT600 Datasheet(HTML) 18 Page - NXP Semiconductors |
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18 / 171 page ![]() RT600 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors B.V. 2024. All rights reserved. Product data sheet Rev. 2.2 — 25 January 2024 18 of 173 NXP Semiconductors RT600 Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4 Audio DSP CPUs PIO0_7/ TRST F3 J2 J15 Z I/O 0 PIO0_7 — General-purpose digital input/output pin. In boundary scan mode: TRST (Test Reset). I/O 1 FC1_SCK — Flexcomm 1: USART, SPI, or I2S clock. I 2 SCT0_GPI4 — Pin input 4 to SCTimer/PWM. O 3 SCT0_OUT4 — SCTimer/PWM output 4. O 4 CTIMER1_MAT0 — 32-bit CTimer1 match output 0. O 5 I2S_BRIDGE_CLK_OUT — Allows I2S bypass by re-routing a pin that includes the I2S_BRIDGE_CLK_IN function to this pin. 6 R — Reserved. 7 R — Reserved. I/O 8 SEC_PIO0_7 — Secure GPIO pin. PIO0_8/ TCK E4 K4 K16 Z I/O 0 PIO0_8 — General-purpose digital input/output pin. In boundary scan mode: TCK (Test Clock In). I/O 1 FC1_TXD_SCL_MISO_WS — Flexcomm 1: USART transmitter, I2C clock, SPI master-in/slave-out data I/O, I2S word select/frame. I 2 SCT0_GPI5 — Pin input 5 to SCTimer/PWM. O 3 SCT0_OUT5 — SCTimer/PWM output 5. O 4 CTIMER1_MAT1 — 32-bit CTimer1 match output 1. O 5 I2S_BRIDGE_WS_OUT — Allows I2S bypass by re-routing a pin that includes the I2S_BRIDGE_WS_IN function to this pin. 6 R — Reserved. 7 R — Reserved. I/O 8 SEC_PIO0_8 — Secure GPIO pin. PIO0_9/ TMS E3 L3 K15 Z I/O 0 PIO0_9 — General-purpose digital input/output pin. In boundary scan mode: TMS (Test Mode Select). I/O 1 FC1_RXD_SDA_MOSI_DATA — Flexcomm 1: USART receiver, I2C data I/O, SPI master-out/slave-in data, I2S data I/O. I 2 SCT0_GPI6 — Pin input 6 to SCTimer/PWM. O 3 SCT0_OUT6 — SCTimer/PWM output 6. O 4 CTIMER1_MAT2 — 32-bit CTimer1 match output 2. O 5 I2S_BRIDGE_DATA_OUT — Allows I2S bypass by re-routing a pin that includes the I2S_BRIDGE_DATA_IN function to this pin. 6 R — Reserved. 7 R — Reserved. I/O 8 SEC_PIO0_9 — Secure GPIO pin. Table 4. Pin description …continued Symbol Description |
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