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RT600 Datasheet(PDF) 51 Page - NXP Semiconductors

Part # RT600
Description  Dual-core microcontroller with 32-bit Cortex®-M33 and Xtensa HiFi4 Audio DSP CPUs; Up to 4.5 MB SRAM; FlexSPI with cache and dynamic decryption; High-speed USB device/host Phy; 12-bit 1 Msamples/s ADC; Analog Comparator; Audio
PDF  171 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

RT600 Datasheet(HTML) 51 Page - NXP Semiconductors

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RT600
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors B.V. 2024. All rights reserved.
Product data sheet
Rev. 2.2 — 25 January 2024
51 of 173
NXP Semiconductors
RT600
Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4
Audio DSP CPUs
9. Termination of unused pins
Table 6 shows how to terminate pins that are
not used in the application. In many cases,
unused pins can be left unconnected since pins are default high Z state (input buffer
disabled).
[1] Z = High impedance; I = Input; O = Output
9.0.1 Pin states in different power modes
[1] Default and programmed pin states are retained in sleep and deep-sleep.
Table 6.
Termination of unused pins
Pin
Default state[1] Recommended termination of unused pins
All PIOn pins
Z
Leave unconnected.
PMIC_I2C_SCL/SDA Z
Leave unconnected.
PMIC_IRQ_N
I; Z
10 kΩ resistor to VDD_AO1V8.
PMIC_MODEn
O
Leave unconnected.
RESETN
I
100 kΩ resistor to VDD_AO1V8.
RTCXIN
I
Connect to ground.
RTCXOUT
-
Leave unconnected.
USB1_DM/DP
-
Leave unconnected.
USB1_VBUS
-
Leave unconnected.
USB1_VDD3V3
-
Leave unconnected.
VDD_AO1V8
-
Connect to 1.8V power.
VDD_1V8
-
Connect to 1.8V power.
VDD_1V8_1
-
Connect to 1.8V power during active. Can be powered off during deep sleep mode
to reduce current consumption by approximately 65 uA.
VDDA_ADC1V8
-
Connect to 1.8V power.
VDDA_BIAS
-
Connect to 1.8 V power.
VREFN
-
Connect to ground.
VREFP
-
Connect to VDDA_ADC1V8
VSSA
-
Connect to ground.
XTALIN
I
Connect to ground.
XTALOUT
-
Leave unconnected.
Table 7.
Pin states in different power modes
Pin
Active
Sleep
Deep-sleep
Deep power-down
All PIOn pins
As configured in IOCON[1]. Default is Z (input, pull-up, and pull-down disable)
PMIC_MODE0/1
00
00



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