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RF226AP Datasheet(PDF) 29 Page - NXP Semiconductors |
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RF226AP Datasheet(HTML) 29 Page - NXP Semiconductors |
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29 / 46 page ![]() Table 10. isolation between RF pins (continued) TX1_M B_OU T 30 50 30 30 50 30 - - - 30 50 30 dB TX1_H B_OU T 30 30 50 30 30 50 - - - 30 30 50 dB TRX2: TX TX2_L B_OU T 50 30 30 50 30 30 50 30 30 - - - dB TX2_M B_OU T 30 50 30 30 50 30 30 50 30 - - - dB TX2_H B_OU T 30 30 50 30 30 50 30 30 50 - - - dB 3.6 Frequency generation specification Several LO-signals and clocks have to be generated independently in RF112L0H Transceiver. To retain the RF path coherence after power-up, all the synthesizers as well as all LO dividers must be running all the time after power on. The frequency dividers must be able to track the frequency while tuning, not missing any clock pulses, so that the mixer phases will be the same when returning to the same frequency after a frequency change. The TRX and the two observation receiver chains each require its own synthesizers. The clocks used by the LVDS interfaces are generated internally in the LVDS IP and are consequently not described here. An overview of the LO and clock generation architecture is shown in the figure below. Electrical characteristics RF112L0H Transceiver Data Sheet, Rev. A, 12/2020 NXP Semiconductors Preliminary 29 Confidential Proprietary |
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