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RF226AP Datasheet(PDF) 31 Page - NXP Semiconductors |
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RF226AP Datasheet(HTML) 31 Page - NXP Semiconductors |
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31 / 46 page ![]() TRX: fVCO = 19200.0 - 24000.0 MHz RO1 HB RO1 HB RO2 LB RO1 fVCO/2 fVCO/4 fVCO/2 3VCO/2 5fVCO/2 7fVCO/2 9fVCO/2 2fVCO 3fVCO 4fVCO 5fVCO fVCO 5fVCO/8 5fVCO/4 3fVCO/2 7fVCO/4 9fVCO/4 5fVCO/2 11fVCO/4 13fVCO/4 fVCO/2 2fVCO fVCO 3fVCO/2 fVCO/4 3fVCO/8 fVCO/2 fVCO/8 LB HB 2fVCO 3fVCO 5fVCO/2 fVCO fVCO = 3200.0 - 4000.0 MHz RO2 fVCO = 1960.0 - 2400.0 MHz 0 1000 3000 4000 5000 6000 Frequency (MHz) 7000 8000 9000 10000 11000 2000 aaa-037093 3fVCO/4 Figure 17. Graphical illustration of the frequency planning. Y-axis has no relevance. The synthesizer reference frequency, typically 160.0 MHz, is generated by multiplying the crystal oscillator clock at 40 MHz by 4 using a DLL. The crystal oscillator can either drive its own crystal or receive an external clock input - either as a sinusoidal signal or a 0.9 V CMOS signal. The LVDS interface can be used to either input a 160 MHz reference clock, to be used instead of the crystal oscillator clock, or to output a 160 MHz reference clock, to be used by other chips, see below Figure 18 . The 160 MHz clock cannot be used to start up the chip, to reset and configure the transceiver a 40 MHz clock must be input through or generated by the crystal. Electrical characteristics RF112L0H Transceiver Data Sheet, Rev. A, 12/2020 NXP Semiconductors Preliminary 31 Confidential Proprietary |
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