33989 datasheet(51/66 Pages) FREESCALE

51 / 66 page

Analog Integrated Circuit Device Data

Freescale Semiconductor

33989

TYPICAL APPLICATIONS

SUPPLEMENTAL APPLICATION NOTES

Analysis: CAN Frame with 11 Bits of Identifier Field at 1

Figure 42 is the calculation for the TCAN time with only “1”

in the identifier field.

Figure 42. CAN Frame with 11 Bits of Identifier Field at 1

Analysis: CAN Frame with 11 Bits of Identifier Field at 0

Figure 43 is the calculation for the TCAN time with only “0”

in the identifier field.

Figure 43. CAN Frame with 11 Bits of Identifier Field at 0

FAILURE ON V2 SUPPLY, CAN BUS LINES AND TX

V2LOW

In order to have proper operation of the CAN interface, V2

must be ON. Two case can be considered:

• V2 is connected with an external ballast: in case of a V2

over load condition, the flag V2LOW is set in to the SBC

IOR register. This flag is set when V2 is below the 4 V

typical. An interrupt can also be triggered upon a

V2LOW event. When V2 is low, the CAN interface

cannot operate.

• V2 is connected to V1 (no ballast transistor used): V2

will be supplied by the V1 voltage. In case V1 is in an

undervoltage condition (ex V1 below the V1 under

voltage reset, typ 4.6 V), the device will enter the reset

mode. The V2LOW flag will also be set. In this case, the

reset pin is active, and the MCU will not send or receive

any CAN messages.

TX Permanent Dominant

A TX permanent dominant condition is detected by the

CAN interface and leads to a disable of the CAN driver. The

TX permanent dominant is detected if TX stays in dominant

(TX low) from more than 360

µs typical. The driver is

automatically re-enabled when TX goes to a high level again.

When a TX permanent dominant is detected, a bit is set into

the SPI register, (bit D2 named TXF in the CAN register). This

bit is latched. In order to clear the bit, two conditions are

necessary:

• No longer “TX permanent failure” AND

• CAN register read operation.

An interrupt can be enabled.The GFAIL flag in the MCR

SOF

5 recessive bits

Stuff bit

5 recessive bits

Stuff bit

1 recessive bit

13 bits are needed to wake-up the SBC.

If the minimum baud rate is used (60 KBaud), TCAN = 16.7 µs*13= 217.1 µs

If 250 KBaud is used: TCAN = 4µs *13= 52 µs

SBC wakes up

TCAN

SOF 4 dominant bits

Stuff bit

5 dominant bits

Stuff bit

17 bits are needed to wake-up the SBC.

If the minimum baud rate is used (60 KBaud), TACN = 16.7 µs*17= 284 µs

If 250 KBaud is used, TCAN = 4µs *17= 68 µs.

2 dominant bits

3 dominant bit if RTR IDE & DLC=0

SBC wakes up

33989 Datasheet(PDF) 51 Page - Freescale Semiconductor, Inc

33989 Datasheet(HTML) 51 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66

Datasheet Download

Link URL