XRT79L71IB datasheet(18/109 Pages) EXAR

18 / 109 page

XRT79L71

1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE

REV. 1.0.0

D10

TxOHIns/

TxHDLCDat_4

Transmit Overhead Data Insert Enable Input pin/Transmit High-Speed

HDLC Controller Input Interface - Data Bus Input pin - Bit 4:

The function of this input pin depends upon whether or not the XRT79L71 has

been configured to operate in the High-Speed HDLC Controller Mode.

Non-High Speed HDLC Controller Mode - TxOHIns - Transmit Overhead

Data Insert Input pin:

This input pin is used to either enable or disable the Transmit Overhead Data

Input Interface block.

If the Transmit Overhead Data Input Interface block is enabled, then it will accept

overhead data from the System-Side terminal equipment via the TxOH input pin;

and insert this data into the overhead bit positions within the outbound DS3 or E3

data stream. Conversely, if the Transmit Overhead Data Input Interface block is

disabled, then it will NOT accept overhead data from the System-Side terminal

equipment.

Pulling this input pin "High" enables the Transmit Overhead Data Input Interface

block. Pulling this input pin "Low" disables the Transmit Overhead Data Input

Interface block.

High-Speed HDLC Controller Mode - TxHDLCDat_4 Transmit High-Speed

HDLC Controller Input Interface - Data Bus Input pin - Bit 4:

If the XRT79L71 is configured to operate in the High-Speed HDLC Controller

mode, then this input pin will function as Bit 4 within the Transmit High-Speed

HDLC Controller Input Interface block - Input Data Bus (e.g., the TxHDL-

CData[7:0] input pins).

The Transmit High-Speed HDLC Controller Input Interface block provides the

System-Side terminal equipment with a byte-wide Transmit HDLC Controller

clock output signal (TxHDLCClk). The Transmit High-Speed HDLC Controller

Input Interface block samples the data residing on this input pin (along with the

rest of the TxHDLCData[7:0] input pins) upon the rising edge of the TxHDLCClk

clock output signal.

B12

TxOHClk

Transmit Overhead Clock Output:

This output pin functions as the Transmit Overhead Data Input Interface clock

signal. If the user enables the Transmit Overhead Data Input Interface block by

asserting the TxOHIns input pin, then the Transmit Overhead Data Input Inter-

face block will sample and latch the data residing on the TxOH input pin upon the

falling edge of this signal.

NOTE: The Transmit Overhead Data Input Interface block is disabled if the user

has configured the XRT79L71 to operate in the High-Speed HDLC

Controller Mode.

PIN #NAME

TYPE

DESCRIPTION

XRT79L71IB Datasheet(PDF) 18 Page - Exar Corporation

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