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XRT79L71IB Datasheet(PDF) 64 Page - Exar Corporation

Part # XRT79L71IB
Description  1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE
PDF  109 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT79L71IB Datasheet(HTML) 64 Page - Exar Corporation

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XRT79L71
61
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE
REV. 1.0.0
• The Transmit High-Speed HDLC Controller Block
• The Transmit LAPD Controller Block
• The Transmit FEAC Controller Block (DS3 Applications only)
• The Transmit Trail-Trace Message Controller Block (E3, ITU-T G.832 Applications only)
• The Transmit SSM Controller Block (E3, ITU-T G.832 Applications only)
• The Transmit DS3/E3 Framer Block
• The Transmit DS3/E3 LIU Block
• The Receive DS3/E3 LIU Block
• The Receive DS3/E3 Framer Block
• The Receive Trail-Trace Message Controller Block (E3, ITU-T G.832 Applications only)
• The Receive SSM Controller Block (E3, ITU-T G.832 Applications only)
• The Receive FEAC Controller Block (DS3 Applications only)
• The Receive LAPD Controller Block
• The Receive High-Speed HDLC Controller Block
Each of these functional blocks is briefly discussed below. These functional blocks will also be discussed in
considerable detail throughout this data sheet.
The Transmit High-Speed HDLC Controller Block
The purpose of the Transmit High-Speed HDLC Controller block is to perform the following tasks.
• To accept user payload data, in a byte-wide manner (via an 8-bit wide Input Data Bus)
• To (while accepting this user payload data, via this byte-wide interface, encapsulate this user data into an
HDLC frame)
• To generate and transmit a repeating string of Flag Sequence octets (0x7E), whenever the Transmit High-
Speed HDLC Controller block is not accepting nor processing user data
• To route these outbound HDLC frames and Flag Sequence octets to the Transmit DS3/E3 Framer block for
further processing.
NOTES:
1.
Whenever the XRT79L71 has been configured to operate in the High-Speed HDLC Controller Mode, then the role
of the Transmit Payload Data Input Interface block will be replaced by the Transmit High-Speed HDLC Controller
block.
2.
The Transmit High Speed HDLC Controller block should NOT be confused with the Transmit LAPD Controller
block (which also exists within the XRT79L71).
The Transmit Overhead Data Input Interface block (not shown in Figure 3)
If the XRT79L71 has been configured to operate in the High-Speed HDLC Controller Mode, then the Transmit
Overhead Data Input Interface block will be disabled.
The Transmit LAPD Controller Block
The purpose of the Transmit LAPD Controller block is to permit the user to transmit LAPD/PMDL (Path
Maintenance Data Link) Messages to the remote terminal equipment. The Transmit LAPD Controller block
comes with a LAPD Controller/Transmitter (not to be confused with the Transmit High-Speed HDLC Controller)
and 90 bytes of on-chip RAM (for storage of outbound PMDL Messages) prior to transmission.
The Transmit FEAC Controller Block (DS3 Applications only)
The purpose of the Transmit FEAC Controller block is to permit the user to transmit FEAC (Far-End Alarm &
Control) Messages to the remote terminal equipment.



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