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XRT79L71IB Datasheet(PDF) 80 Page - Exar Corporation |
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XRT79L71IB Datasheet(HTML) 80 Page - Exar Corporation |
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80 / 109 page ![]() XRT79L71 77 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE REV. 1.0.0 If the interrupting device turns out to be the XRT79L71 ATM UNI/PPP/Clear-Channel DS3/E3 Framer IC, then the µC/µP must determine which functional block requested the interrupt. Hence, upon reaching this state, one of the very first things that the µC/µP must do within the user supplied XRT79L71 Interrupt Service Routine, is to perform a read of both of the following registers. • Operation Interrupt Status Register - Byte 1 (Address = 0x0112) • Operation Interrupt Status Register - Byte 0 (Address = 0x0113) The bit-format of each of these registers is presented below. Each of the Operation Block Interrupt Status Register presents the interrupt-request status of each of the functional blocks within the chip. The purpose of these two registers is to help the µC/µP identify which functional block(s) has requested the interrupt. Whichever bit(s) are asserted, in this register, identifies which block(s) has requested the interrupt. Whichever bit(s) are asserted, in this register, identifies which block(s) have experienced an interrupt-generating condition as presented in Table 5. Once the µC/µP has read this register, it can determine which branch within the interrupt service routine that it must follow in order to properly service this interrupt. The XRT79L71 ATM UNI/PPP/Clear-Channel DS3/E3 Framer IC further supports the Operational Block hierarchy by providing the Operation Block Interrupt Enable Register - Bytes 1 and 0. The bit format of these two registers are identical to that for the Operation Block Interrupt Status Registers - Byte 1 and 0, and are presented below for the sake of completeness. Operation Interrupt Status Register - Byte 1 (Address = 0x0112) BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Unused DS3/E3 LIU/ JA Block Inter- rupt Status DS3/E3 Framer Block Interrupt Sta- tus Unused R/O R/O R/O R/O R/O R/O R/O R/O 0 0 0 0 0 0 0 0 Operation Interrupt Status Register - Byte 0 (Address = 0x0113) BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Unused Receive ATM Cell/ PPP Processor Block Interrupt Sta- tus Unused Transmit ATM Cell/ PPP Processor Block Interrupt Sta- tus R/O R/O R/O R/O R/O R/O R/O R/O 0 0 0 0 0 0 0 0 |
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