XRT79L71IB datasheet(46/109 Pages) EXAR

46 / 109 page

XRT79L71

1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE

REV. 1.0.0

RxGFC/

RxIdle

Receive GFC Nibble Field - Output Pin/Receive Idle Sequence Indicator:

The function of this output pin depends upon whether the XRT79L71 is operat-

ing in the ATM Mode or in the High-Speed HDLC Controller Mode.

ATM Mode - RxGFC:

This pin, along with the RxGFCClk and the RxGFCMSB pins form the Receive

GFC Nibble-Field serial output port. This pin will serially output the contents of

the GFC Nibble field of each cell that is processed via the Receive Cell Proces-

sor. This data is serially clocked out of this pin on the rising edge of the RxGFC-

Clk signal. The MSB of each GFC value is designated by a pulse at the

RxGFCMSB output pin.

High-Speed HDLC Controller Mode - RxIdle:

The combination of the RxIdle and ValidFCS output signals are used to convey

information about data that is being output via the Receive HDLC Controller out-

put Data bus (RxHDLCDat_[7:0]).

If RxIdle = "High":

The Receive HDLC Controller block will drive this output pin "High" anytime the

flag sequence octet (0x7E) is present on the RxHDLCDat[7:0] output data bus.

If RxIdle and ValidFCS are both "High":

The Receive HDLC Controller block has received a complete HDLC frame, and

has determined that the FCS value within this HDLC frame are valid.

If RxIdle is "High" and ValidFCS is "Low":

The Receive HDLC Controller block has received a complete HDLC frame, and

has determined that the FCS value within this HDLC frame is invalid.

If RxIdle is "High" and ValidFCS is "Low":

The Receive HDLC Controller block has received an ABORT sequence.

NOTE: : This output pin is in-active if the XRT79L71 has been configured to

operate in either the Clear-Channel Framer or in the PPP Modes.

RxGFCClk

Received GFC Nibble Serial Output Port Clock Signal:

This output pin functions as a part of the Receive GFC Nibble-Field Serial Out-

put Port, also consisting of the RxGFC and RxGFCMSB pins. This pin provides

a clock pulse which allows external circuitry to latch in the GFC Nibble-Data via

the RxGFC output pin.

NOTE: This output pin is only active if the XRT79L71 is operating in the ATM

UNI Mode.

RxGFCMSB

Receive GFC Nibble Field - MSB Indicator:

This output pin functions as a part of the Receive GFC Nibble Field Serial Out-

put port which also consists of the RxGFC and RxGFCClk pins. This pin pulses

"High" the instant that the MSB (Most Significant Bit) of a GFC Nibble is being

output on the RxGFC pin.

NOTE: This output pin is only active if the XRT79L71 is operating in the ATM

UNI Mode.

PIN #NAME

TYPE

DESCRIPTION

XRT79L71IB Datasheet(PDF) 46 Page - Exar Corporation

XRT79L71IB Datasheet(HTML) 46 Page - Exar Corporation

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