XRT86VL32IB datasheet(16/65 Pages) EXAR

16 / 65 page

XRT86VL32

DUAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION

REV. V1.2.0

TxCHN0_1/

TxFrTD0

TxCHN2_1/

TxFrTD2

D12

M17

I/O

Transmit Time Slot Octet Identifier Output 1 (TxCHNn_1) /

Transmit Serial Fractional Input (TxFrTDn):

The exact function of these pins depends on whether or not the

transmit framer enables the transmit fractional/signaling interface,

as described below:

If transmit fractional/signaling interface is disabled -

TxCHNn_1

These output signals (TxCHNn_4 through TxCHNn_0) reflect the

five-bit binary value of the current time slot being processed by the

transmit serial interface. Terminal Equipment can use the TxCH-

CLK to sample the five output pins of each channel in order to

identify the time slot being processed. This pin indicates Bit 1 of

the time slot channel being processed.

If transmit fractional/signaling interface is enabled - TxFrTDn

These pins are used as the fractional data input pins to input frac-

tional DS1/E1 payload data which will be inserted within an out-

bound DS1/E1 frame. In this mode, terminal equipment can use

either TxCHCLK or TxSERCLK to clock in fractional DS1/E1 pay-

load data depending on the framer configuration.

NOTES:

Transmit fractional/Signaling interface can be enabled by

programming to bit 4 - TxFr1544/TxFr2048 bit from

These 8 pins are internally pulled “Low” for each

channel.

TxCHN0_2/

Tx32MHz0

TxCHN2_2/

Tx32MHz2

B13

T16

Transmit Time Slot Octet Identifier Output 2 (TxCHNn_2) /

Transmit 32.678MHz Clock Output (Tx32MHZ):

The exact function of these pins depends on whether or not the

transmit framer enables the transmit fractional/signaling interface,

as described below:

If transmit fractional/signaling interface is disabled -

TxCHNn_2

These output signals (TxCHNn_4 through TxCHNn_0) reflect the

five-bit binary value of the current time slot being processed by the

transmit serial interface. Terminal Equipment can use the TxCH-

CLK to sample the five output pins of each channel in order to

identify the time slot being processed. This pin indicates Bit 2 of

the time slot channel being processed.

If transmit fractional/signaling interface is enabled - Tx32MHz

These pins are used to output a 32.678MHz clock reference which

is derived from the MCLKIN input pin.

NOTE:

Transmit

fractional

interface

can

enabled

programming to bit 4 - TxFr1544/TxFr2048 bit from

TRANSMIT SYSTEM SIDE INTERFACE

SIGNAL NAME

BALL#TYPE

OUTPUT

DRIVE(MA)

DESCRIPTION

XRT86VL32IB Datasheet(PDF) 16 Page - Exar Corporation

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