XRT86VL32IB datasheet(31/65 Pages) EXAR

31 / 65 page

XRT86VL32

REV. V1.2.0

DUAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION

TRANSMIT LINE INTERFACE

SIGNAL NAME

BALL #

TYPE

DESCRIPTION

TTIP0

TTIP2

Transmit Positive Analog Output (TTIPn):

TTIP is the positive differential output to the line interface. This output pin,

along with the corresponding TRING output pin, function as the Transmit DS1/

E1 output signal drivers for the XRT86VL32 device.

The user is expected to connect this signal and the corresponding TRING out-

put signal to a 1:2 step up transformer for proper operation.

This output pin will be tri-stated whenever the user sets the “TxON” input pin

or register bit (0xnF02, bit 3) to “0”.

NOTE:

This pin should have a series line capacitor of 0.68

μF for DC blocking

purposes.

TRING0

TRING2

Transmit Negative Analog Output (TRINGn):

TRING is the negative differential output to the line interface. This output pin,

along with the corresponding TTIP output pin, function as the Transmit DS1/

E1 output signal drivers for the XRT86VL32 device.

The user is expected to connect this signal and the corresponding TRING out-

put signal to a 1:2 step up transformer for proper operation.

NOTE:

This output pin will be tri-stated whenever the user sets the “TxON”

input pin or register bit (0xnF02, bit 3) to “0”.

TxON

Transmitter On

This input pin permits the user to either enable or disable the Transmit Output

Driver within the Transmit DS1/E1 LIU Block. If the TxON pin is pulled “Low”,

all 8 Channels are tri-stated. When this pin is pulled ‘High’, turning on or off the

transmitters will be determined by the appropriate channel registers (address

0x0Fn2, bit 3)

LOW = Disables the Transmit Output Driver within the Transmit DS1/E1 LIU

Block. In this setting, the TTIP and TRING output pins of all 8 channels will be

tri-stated.

HIGH = Enables the Transmit Output Driver within the Transmit DS1/E1 LIU

Block. In this setting, the corresponding TTIP and TRING output pins will be

enabled or disabled by programming the appropriate channel register.

(address 0x0Fn2, bit 3)

NOTE:

Whenever the transmitters are turned off, the TTIP and TRING output

pins will be tri-stated.

TIMING INTERFACE

SIGNAL NAME

BALL #

TYPE

OUTPUT

DRIVE (MA)

DESCRIPTION

MCLKIN

Master Clock Input:

This pin is used to provide the timing reference for the internal

master clock of the device. The frequency of this clock is pro-

grammable from 8kHz to 16.384MHz in register 0x0FE9.

E1MCLKnOUT

LIU E1 Output Clock Reference

This output pin is defaulted to 2.048MHz, but can be programmed

to 4.096MHz, 8.192MHz, or 16.384MHz in register 0x0FE4.

XRT86VL32IB Datasheet(PDF) 31 Page - Exar Corporation

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