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XRT86VL32IB Datasheet(PDF) 38 Page - Exar Corporation |
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XRT86VL32IB Datasheet(HTML) 38 Page - Exar Corporation |
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38 / 65 page ![]() XRT86VL32 35 DUAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION REV. V1.2.0 ADDR0 ADDR1 ADDR2 ADDR3 ADDR4 ADDR5 ADDR6 ADDR7 ADDR8 ADDR9 ADDR10 ADDR11 ADDR12 ADDR13 U5 V5 R5 T6 U6 V6 R6 T7 V7 U9 R7 R9 R10 V11 I - Microprocessor Interface Address Bus Input These pins permit the Microprocessor to identify on-chip regis- ters and Buffer/Memory locations within the XRT86VL32 device whenever it performs READ and WRITE operations with the XRT86VL32 device. NOTE: These pins are internally pulled “Low” with a 50k Ω resistor, except ADDR [8:13]. DBEN U4 I - Data Bus Enable Input pin. This active-low input pin permits the user to either enable or tri- state the Bi-Directional Data Bus pins (D[7:0]), as described below. • Setting this input pin “low” enables the Bi-directional Data bus. • Setting this input pin “high” tri-states the Bi-directional Data Bus. ALE U8 I - Address Latch Enable Input Address Strobe The exact behavior of this pin depends upon the type of Micro- processor/Microcontroller the XRT86VL32 has been configured to operate in, as defined by the PTYPE[2:0] pins. Intel-Asynchronous Mode - ALE This active-high input pin is used to latch the address (present at the Microprocessor Interface Address Bus pins (A[14:0]) into the XRT86VL32 Microprocessor Interface block and to indicate the start of a READ or WRITE cycle. Pulling this input pin “high” enables the input bus drivers for the Address Bus input pins (A[14:0]). The contents of the Address Bus will be latched into the XRT86VL32 Microprocessor Inter- face circuitry, upon the falling edge of this input signal. Motorola-Asynchronous (68K) Mode - AS* This active-low input pin is used to latch the data residing on the Address Bus, A[14:0] into the Microprocessor Interface cir- cuitry of the XRT86VL32 device. Pulling this input pin “low” enables the input bus drivers for the Address Bus input pins. The contents of the Address Bus will be latched into the Microprocessor Interface circuitry, upon the rising edge of this signal. Power PC 403 Mode - No Function -Tie to GND: This input pin has no role nor function and should be tied to GND. MICROPROCESSOR INTERFACE SIGNAL NAME BALL #TYPE OUTPUT DRIVE (MA) DESCRIPTION |
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