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STPMIC25APQR Datasheet(PDF) 46 Page - STMicroelectronics |
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STPMIC25APQR Datasheet(HTML) 46 Page - STMicroelectronics |
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46 / 145 page  Table 22. Turn-on conditions from external trigger source summary Source Turn-on condition Debounce PONKEYn pin PONKEYn signal low from the PMIC in a NO_SUPPLY state when VIN rises and crosses VINPOR_Rise N/A PONKEYn pin PONKEYn signal falling edge when the PMIC is in the OFF state tPONKEYnDB WAKEUPn pin WAKEUPn signal low No debounce VBUS pin VBUS signal high from the PMIC in the NO_SUPPLY state when VIN rises and crosses VINPOR_Rise N/A VBUS pin VBUS signal rising edge when the PMIC is in the OFF state tVBUSDB 5.4.3.2 AUTO turn-ON AUTO turn-ON allows the PMIC to be turned ON automatically when VIN rises from VIN < VINPOR_Fall. An AUTO turn-ON event is triggered only from a NO_SUPPLY state transition: 1. VIN rises from VINPOR_Fall to VINPOR_Rise 2. PMIC goes into INIT&LOAD state then the AUTO_TURN_ON bit is enabled in the NVM 3. PMIC goes into the CHECK&LOAD state, waiting for VIN > VINOK 4. PMIC POWER_UP The AUTO turn-ON is enabled in the NVM by default in NVM content. 5.4.4 Turn-off conditions Turn-off conditions are triggered by events or stimulus leading the PMIC to perform a POWER_DOWN sequence. Following the POWER_DOWN sequence, the PMIC can switch to the OFF state or to the FAIL_SAFE_LOCK state or restart automatically (power cycle), depending on the source that has triggered the turn-off condition. There are six sources triggering a turn-off condition detailed in Table 23 Table 23. Turn-off condition trigger sources Source Type Turn-off condition Power cycle condition Software switch- OFF switch-off Writing 1 to SWOFF bit. RREQ_EN = 1 VINOK_Fall hard-fault VIN falls below the VINOK_Fall threshold (with VIN keeps it higher than VIN_POR_Fall). See Section 5.4.1. VIN_FLT_CNT <= VIN_FLT_CNT_MAX PONKEYn long key press hard-fault PKEY_LKP_OFF bit set or NVM_PKEY_LKP_OFF bit set (NVM). Long key press duration can be set in PKEY_LKP_TMR[3:0] bitfield or in NVM_PKEY_LKP_TMR[1:0] bit field (NVM). PONKEYn signal is asserted low for a duration > PKEY_LKP_TMR[3:0]. PKEY_FLT_CNT <= PKEY_FLT_CNT_MAX Thermal shutdown hard-fault PMIC junction temperature exceeds the TSHDN_Rise threshold. See Section 5.4.8. TSHDN_FLT_CNT <= TSHDN_FLT_CNT_MAX Overcurrent protection hard-fault Overcurrent detected on a regulator (related regulator NVM_FS_OCP_xxx. (1) bit set in NVM or FS_OCP_xxx (1) bit set by software). See Section 5.4.9. OCP_FLT_CNT <= OCP_FLT_CNT_MAX Watchdog hard-fault Watchdog feature active and timer expired. See Section 5.4.10. WDG_FLT_CNT <= WDG_FLT_CNT_MAX 1. xxx: instance name of the regulator, eg: LDO1, LDO2, BUCK1, 5.4.4.1 Turn-OFF condition triggered by software switch-off When the software sets the SWOFF bit, the PMIC starts a POWER_DOWN sequence immediately, then the PMIC goes into the OFF state. The TURN_OFF_SR is set accordingly. STPMIC25 Feature descriptions DS14278 - Rev 3 page 46/145 |
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