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STPMIC25APQR Datasheet(PDF) 65 Page - STMicroelectronics |
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STPMIC25APQR Datasheet(HTML) 65 Page - STMicroelectronics |
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65 / 145 page  Hex Register Name R/W BITS[7:0] 7 6 5 4 3 2 1 0 Status registers 0xAA NVM_PD_SHR2 R/W NVM_RDD R_PD - NVM_BUCK7_PD[1:0] NVM_BUCK6_PD[1:0] NVM_BUCK5_PD[1:0] 0xAB NVM_PD_SHR3 R/W NVM_LDO 8_PD NVM_LDO 7_PD NVM_LDO 6_PD NVM_LDO 5_PD NVM_LDO 4_PD NVM_LDO 3_PD NVM_LDO 2_PD NVM_LDO 1_PD 0xAC NVM_BUCKS_IOUT _SHR1 R/W BUCK4_ILIM[1:0] BUCK3_ILIM[1:0] BUCK2_ILIM[1:0] BUCK1_ILIM[1:0] 0xAD NVM_BUCKS_IOUT _SHR2 R/W HICCUP_DLY[1:0] BUCK7_ILIM[1:0] BUCK6_ILIM[1:0] BUCK5_ILIM[1:0] 0xAE NVM_LDOS_IOUT_ SHR R/W LDO7_ILIM[1:0] LDO6_ILIM[1:0] LDO5_ILIM[1:0] LDO2_ILIM[1:0] 0xAF NVM_FS_OCP_SHR 1 R/W NVM_FS_ OCP_REF DDR NVM_FS_ OCP_BUC K7 NVM_FS_ OCP_BUC K6 NVM_FS_ OCP_BUC K5 NVM_FS_ OCP_BUC K4 NVM_FS_ OCP_BUC K3 NVM_FS_ OCP_BUC K2 NVM_FS_ OCP_BUC K1 0xB0 NVM_FS_OCP_SHR 2 R/W LDO1 to LDO8 LDO1 to LDO7 LDO1 to LDO6 LDO1 to LDO5 LDO1 to LDO4 LDO1 to LDO3 LDO1 to LDO2 NVM_FS_ OCP_LDO 1 0xB1 NVM_FS_SHR1 R/W VIN_FLT_CNT_MAX[3:0] PKEY_FLT_CNT_MAX[3:0] 0xB2 NVM_FS_SHR2 R/W TSHDN_FLT_CNT_MAX[3:0] OCP_FLT_CNT_MAX[3:0] 0xB3 NVM_FS_SHR3 R/W - FS_LOCK _DIS RST_FLT_CNT_TMR[1: 0] WDG_FLT_CNT_MAX[3:0] 0xB5 NVM_I²C_ADDR_SH R R/W LOCK_NV M I2C_ADDR[6:0] 0xB6 NVM_USER_SHR1 R/W NVM_USER1[7:0] 0xB7 NVM_USER_SHR2 R/W NVM_USER2[7:0] 6.2 Status registers 6.2.1 Product ID status register (PRODUCT_ID_SR) Table 31. PRODUCT_ID_SR 7 6 5 4 3 2 1 0 PMIC_REF_ID[3:0] PMIC_NVM_ID[3:0] R R R R R R R R • Address: 0x00 • Default: 0x2X (X depends on PMIC variant) • Description: PMIC product ID status register. [7:4] PMIC_REF_ID[3:0]: PMIC family of devices 0010: STPMIC25 product family (fixed value) [3:0] Version A and B only 0000: reserved 0001: A 0002: B 0011: reserved STPMIC25 Register descriptions DS14278 - Rev 3 page 65/145 |
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