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STPMIC25APQR Datasheet(PDF) 86 Page - STMicroelectronics

Part # STPMIC25APQR
Description  Highly integrated power management IC for microprocessor units
PDF  145 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPMIC25APQR Datasheet(HTML) 86 Page - STMicroelectronics

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6.3.11
Buck pull-down control register 2 (BUCKS_PD_CR2)
Table 52. BUCKS_PD_CR2
7
6
5
4
3
2
1
0
reserved
reserved
BUCK7_PD[1:0]
BUCK6_PD[1:0]
BUCK5_PD[1:0]
R
R
R/W
R/W
R/W
R/W
R/W
R/W
•
Address: 0x1A
•
Default: 0bXXXXXXXX where X depends on the value programmed in the NVM
•
Description: Bucks pull-down control register 2.
–
This register is initialized to the default value in the INIT&LOAD and in the CHECK&LOAD states.
[7:6]
reserved
[5:4]
BUCK7_PD[1:0]: BUCK7 pull-down selection.
00: no pull-down
01: slow pull-down active when BUCK7 is disabled (EN = 0)
10: fast pull-down active when BUCK7 is disabled (EN = 0)
11: slow pull-down forced active
[3:2]
BUCK6_PD[1:0]: BUCK6 pull-down selection.
00: no pull-down
01: slow pull-down active when BUCK6 is disabled (EN = 0)
10: fast pull-down active when BUCK6 is disabled (EN = 0)
11: slow pull-down forced active
[1:0]
BUCK5_PD[1:0]: BUCK5 pull-down selection.
00: no pull-down
01: slow pull-down active when BUCK5 is disabled (EN = 0)
10: fast pull-down active when BUCK5 is disabled (EN = 0)
11: slow pull-down forced active
STPMIC25
Register descriptions
DS14278 - Rev 3
page 86/145



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