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STPMIC25APQR Datasheet(PDF) 70 Page - STMicroelectronics

Part # STPMIC25APQR
Description  Highly integrated power management IC for microprocessor units
PDF  145 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPMIC25APQR Datasheet(HTML) 70 Page - STMicroelectronics

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6.2.6
Overcurrent protection status register 1 (OCP_SR1)
Table 35. Overcurrent protection status register 1 (OCP_SR1)
7
6
5
4
3
2
1
0
OCP_REFDDR OCP_BUCK7 OCP_BUCK6 OCP_BUCK5 OCP_BUCK4 OCP_BUCK3 OCP_BUCK2 OCP_BUCK1
R
R
R
R
R
R
R
R
•
Address: 0x05
•
Default: 0bxxxxxxxx where x depends on regulator that has triggered the OCP.
•
Description: If the PMIC turned OFF or restarted due to an OCP from regulator, OCP_SR1 or OCP_SR2
store the regulator instance that triggered the OCP.
The OCP_SR1 register is reset in the POWER_DOWN state. If an OCP hard-fault condition occurred, then the
OCP_SR1 register is set before leaving the POWER_DOWN state (see Section 5.4.9 and Section 5.4.4 and
Section 5.1.2).
[7]
OCP_REFDDR: Last turn-off or restart is due to overcurrent protection on REFDDR.
0: False
1: True
[6]
OCP_BUCK7: Last turn-off or restart is due to overcurrent protection on BUCK7.
0: False
1: True
[5]
OCP_BUCK6: Last turn-off or restart is due to overcurrent protection on BUCK6.
0: False
1: True
[4]
OCP_BUCK5: Last turn-off or restart is due to overcurrent protection on BUCK5.
0: False
1: True
[3]
OCP_BUCK4: Last turn-off or restart is due to overcurrent protection on BUCK4.
0: False
1: True
[2]
OCP_BUCK3: Last turn-off or restart is due to overcurrent protection on BUCK3.
0: False
1: True
[1]
OCP_BUCK2: Last turn-off or restart is due to overcurrent protection on BUCK2.
0: False
1: True
[0]
OCP_BUCK1: Last turn-off or restart is due to overcurrent protection on BUCK1.
0: False
1: True
STPMIC25
Register descriptions
DS14278 - Rev 3
page 70/145



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