H838024 datasheet(312/697 Pages) RENESAS

Part #	H838024

Description	Renesas 8-Bit Single-Chip Microcomputer Super Low Power Series

PDF	697 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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312 / 697 page

Section 9 Timers

Rev. 7.00 Mar 10, 2005 page 270 of 652

REJ09B0042-0700

Bit 2—Compare Match Flag L (CMFL)

Bit 2 is a status flag indicating that TCFL has matched OCRFL. This flag is set by hardware and

cleared by software. It cannot be set by software.

Bit 2

CMFL

Description

Clearing condition:

(initial value)

After reading CMFL = 1, cleared by writing 0 to CMFL

Setting condition:

Set when the TCFL value matches the OCRFL value

Bit 1—Timer Overflow Interrupt Enable L (OVIEL)

Bit 1 selects enabling or disabling of interrupt generation when TCFL overflows.

Bit 1

OVIEL

Description

TCFL overflow interrupt request is disabled

(initial value)

TCFL overflow interrupt request is enabled

Bit 0—Counter Clear L (CCLRL)

Bit 0 selects whether TCFL is cleared when TCFL and OCRFL match.

Bit 0

CCLRL

Description

TCFL clearing by compare match is disabled

(initial value)

TCFL clearing by compare match is enabled

H838024 Datasheet(PDF) 312 Page - Renesas Technology Corp