H838024 datasheet(311/697 Pages) RENESAS

311 / 697 page

Section 9 Timers

Rev. 7.00 Mar 10, 2005 page 269 of 652

REJ09B0042-0700

Bit 5—Timer Overflow Interrupt Enable H (OVIEH)

Bit 5 selects enabling or disabling of interrupt generation when TCFH overflows.

Bit 5

OVIEH

Description

TCFH overflow interrupt request is disabled

(initial value)

TCFH overflow interrupt request is enabled

Bit 4—Counter Clear H (CCLRH)

In 16-bit mode, bit 4 selects whether TCF is cleared when TCF and OCRF match.

In 8-bit mode, bit 4 selects whether TCFH is cleared when TCFH and OCRFH match.

Bit 4

CCLRH

Description

16-bit mode: TCF clearing by compare match is disabled

8-bit mode: TCFH clearing by compare match is disabled

(initial value)

16-bit mode: TCF clearing by compare match is enabled

8-bit mode: TCFH clearing by compare match is enabled

Bit 3—Timer Overflow Flag L (OVFL)

Bit 3 is a status flag indicating that TCFL has overflowed from H'FF to H'00. This flag is set by

hardware and cleared by software. It cannot be set by software.

Bit 3

OVFL

Description

Clearing condition:

(initial value)

After reading OVFL = 1, cleared by writing 0 to OVFL

Setting condition:

Set when TCFL overflows from H’FF to H’00

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