| Electronic Components Datasheet Search |
|
PM5316 Datasheet(PDF) 39 Page - PMC-Sierra, Inc |
|
|
|||||||||||||||||||||||||||||
PM5316 Datasheet(HTML) 39 Page - PMC-Sierra, Inc |
|
39 / 491 page ![]() SONET/SDH Payload Extractor/Aligner (SPECTRA-4x155) Production Proprietary and Confidential to PMC-Sierra, Inc. and for its customers’ internal use 20 Document ID: PMC-1990822, Issue 4 Pin Name Type Pin No. Function LRDI1/ LRDI2/ LRDI3/ LRDI4/ /RRCPCLK1 /RRCPCLK2 /RRCPCLK3 /RRCPCLK4 Output A12 D12 C11 B10 A12 D12 C11 B10 The RDI (LRDI1-4) signal is active when the ring control port is disabled. LRDI1-4 is set high when line RDI is detected in the corresponding incoming stream. LRDI is declared when the 110 binary pattern is detected in bits 6, 7, and 8 of the K2 byte for three or five consecutive frames. LRDI is removed when any pattern other than 110 is detected in bits 6, 7, and 8 of the K2 byte for three or five consecutive frames. The LRDIDET bit in the RLOP Control and Status register of the corresponding channel controls the selection of three or five consecutive frames. LRDI1-4 is updated on the rising edge of RCLK1-4. The Receive ring control port clock (RRCPCLK1-4) signal provides timing for the receive ring control port when the ring control port is enabled. RRCPCLK1-4 is nominally a 3.24 MHz clock and can be connected directly to the TRCPCLK1-4 inputs of a mate SPECTRA- 4x155 in ring-based Add-Drop multiplexer applications. The RCPEN bit in the Ring Control register of the corresponding channel controls the enabling and disabling of the ring control port. The RRCPFP1-4 and RRCPDAT1-4 signals are updated on the falling edge of RRCPCLK1-4. LAIS1/ LAIS2/ LAIS3/ LAIS4/ /RRCPDAT1 /RRCPDAT2 /RRCPDAT3 /RRCPDAT4 Output B12 E12 D11 C10 B12 E12 D11 C10 The line alarm indication (LAIS1-4) signal is active when the ring control port is disabled. LAIS1-4 is set high when line AIS is detected in the corresponding incoming stream. Line AIS is declared when the 111 binary pattern is detected in bits 6, 7, and 8 of the K2 byte for three or five consecutive frames. Line AIS is removed when any pattern other than 111 is detected in bits 6, 7, and 8 of the K2 byte for three or five consecutive frames. The LAISDET bit in the RLOP Control and Status register of the corresponding channel controls the selection of three or five consecutive frames. The LAIS1-4 outputs are updated on the rising edge of RCLK1-4. The Receive ring control port data (RRCPDAT1-4) signal contains the receive ring control port data stream when the ring control port is enabled. The receive ring control port data consists of the filtered K1, K2 byte values, the change of APS value bit position, the protection switch byte failure status bit position, the send line AIS and send line RDI bit positions, and the line REI bit positions. RRCPDAT1-4 can be connected directly to the TRCPDAT1-4 inputs of a mate SPECTRA-4x155 in ring-based Add-Drop multiplexer applications. The RCPEN bit in the Ring Control register of the corresponding channel controls the enabling and disabling of the ring control port. The RRCPDAT1-4 signal is updated on the falling edge of RRCPCLK1-4. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |