PM5316 datasheet(97/491 Pages) PMC

97 / 491 page

SONET/SDH Payload Extractor/Aligner (SPECTRA-4x155)

Production

Proprietary and Confidential to PMC-Sierra, Inc. and for its customers’ internal use

Document ID: PMC-1990822, Issue 4

• Z1 bytes of STS-1 #2 and #3.

• Z2 bytes of STS-1 #1 and #2.

10.13 Transmit Line Overhead Processor (TLOP)

The Transmit Line Overhead Processor block (TLOP) processes the line overhead of a transmit

STS-3 (STM-1) stream.

10.13.1 APS Insert

The APS Insert Block of TLOP inserts the two APS channel bytes of the Line Overhead (K1 and

K2) into the transmit stream when enabled by an internal register. The inserted K1 and K2 may

also be overwritten via insertion by the TTOC block.

10.13.2 Line BIP Calculate

The Line BIP Calculate Block of TLOP calculates the line BIP-24/8 error detection code (B2)

based on the line overhead and SPE of the transmit stream. The line BIP-24/8 code is a bit

interleaved parity calculation using even parity. Details are provided in the references. The

calculated BIP-24/8 code is inserted into the B2 byte positions of the following frame. BIP-24/8

errors may be continuously inserted under register control for diagnostic purposes. Errors may be

inserted in the B2 code for diagnostic purposes.

10.13.3 Line RDI Insert

The Line RDI Insert Block of TLOP controls the insertion of RDI. Line RDI may be inserted in

the transmit stream under the control of an external input (TLRDI1-4), or a writeable register. The

bits in the SPECTRA-4x155 Line RDI Control Register controls the immediate insertion of Line

RDI upon detection of various errors in the received SONET/SDH stream. Line RDI may also be

inserted when enabling the Transmit Ring Control port (TRCP) and by setting high the

SENDLRDI bit position. Line RDI is inserted by transmitting the code 110 (binary) in bit

positions 6, 7, and 8 of the K2 byte contained in the transmit stream.

10.13.4 Line REI Insert

The Line REI Insert Block of TLOP accumulates line BIP-24/8 errors (B2) detected by the

Receive Line Overhead Processor and encodes remote error indications in the transmit M1 byte.

Line REI may be inserted automatically in the SONET/SDH stream under the control of the

AUTOLREI bit in the SPECTRA-4x155 Ring Control Register. Receive B2 errors are

accumulated and optionally inserted automatically in bits 2 to 8 of the third Z2/M1 byte of the

transmit STS-3 (STM-1) stream. Up to 24 errors may be inserted per frame.

Line REI may also be inserted when enabling the Transmit Ring Control port (TRCP) and by

setting high the REI bit positions.

PM5316 Datasheet(PDF) 97 Page - PMC-Sierra, Inc