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PM5357 Datasheet(PDF) 67 Page - PMC-Sierra, Inc |
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PM5357 Datasheet(HTML) 67 Page - PMC-Sierra, Inc |
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67 / 432 page ![]() PRODUCTION S/UNI-622-POS PMC-Sierra, Inc. PM5357 S/UNI-622-POS DATASHEET PMC-1980911 ISSUE 5 SATURN USER NETWORK INTERFACE (622-POS) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 62 Notes on Pin Description: 1. All S/UNI-622-POS inputs and bi-directional signals present minimum capacitive loading and operate at TTL logic levels except the inputs marked as Analog or differential pseudo-ECL (PECL). 2. The RDAT[15:0], RPRTY, RSOC/RSOP, REOP, RMOD, RERR, RCA/RPA, RVAL, RCLK, RFPO, TCA/TPA, TCLK, TFPO, POUT[7:0], FPOUT and OOF outputs have a 8mA drive capability. The TDO and INTB outputs have a 2mA drive capability. All other digital outputs and bi-directional signals have 4mA drive capability. 3. The system interface inputs RFCLK, RENB, TFCLK, TENB, TDAT[15:0], TMOD, TERR, TSOC/TSOP, TEOP and TPRTY do not use the ESD bias voltages (VBIAS and PBIAS pins) and are 3.3V tolerate only. All other digital inputs (excluding inputs marked Analog), may operate with 5V signalling with appropriate ESD biasing. 4. The differential pseudo-ECL inputs and outputs should be terminated in a passive network and interface at PECL levels as described in the Operation section. 5. It is mandatory that every digital ground pin (VSS) be connected to the printed circuit board ground plane to ensure reliable device operation. 6. It is mandatory that every digital power pin (VDD) be connected to the printed circuit board power plane to ensure reliable device operation. 7. All analog power and ground pins can be sensitive to noise. They must be isolated from the digital power and ground. Care must be taken to correctly decouple these pins. Please refer to the Operation section and the S/UNI- 622-POS reference design (PMC-981070) for more information. 8. Due to ESD protection structures in the pads it is necessary to exercise caution when powering a device up or down. ESD protection devices behave as diodes between power supply pins and from I/O pins to power supply pins. Under extreme conditions it is possible to damage these ESD protection devices or trigger latch up. Please adhere to the recommended power supply sequencing as described in the Operation section of this document. |
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