PM5357 datasheet(79/432 Pages) PMC

79 / 432 page

PRODUCTION

S/UNI-622-POS

PMC-Sierra, Inc.

PM5357

S/UNI-622-POS

DATASHEET

PMC-1980911

ISSUE 5

SATURN USER NETWORK INTERFACE (622-POS)

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE

Invalid pointer indications (inv_point), invalid NDF codes, new pointer indications

(new_point), discontinuous change of pointer alignment, and illegal pointer

changes are also detected and reported by the Pointer Interpreter block via

enabled or NDF disabled definitions. The third occurrence of equal new_point

indications (3 x eq_new_point) is reported as a discontinuous change of pointer

alignment event (DISCOPA) instead of a new pointer event and the active offset

is updated with the receive pointer value. An illegal pointer change is defined as

a inc_ind or dec_ind indication that occurs within three frames of the previous

inc_ind, dec_ind or NDF_enable indications. Illegal pointer changes may be

optionally disabled via register bits.

The active offset value is used to extract the path overhead from the incoming

stream and can be read from an internal register.

SPE Timing

The SPE Timing Block provides SPE timing information to the Error Monitor and

the Extract blocks. The block contains a free running timeslot counter that is

initialized by a J1 byte identifier (which identifies the first byte of the SPE).

Control signals are provided to the Error Monitor and the Extract blocks to

identify the Path Overhead bytes and to downstream circuitry to extract the ATM

cell or POS payload.

Error Monitor

The Error Monitor Block contains two 16-bit counters that are used to accumulate

path BIP-8 errors (B3), and far end block errors (FEBEs). The contents of the

two counters may be transferred to holding registers, and the counters reset

under microprocessor control.

Path BIP-8 errors are detected by comparing the path BIP-8 byte (B3) extracted

from the current frame, to the path BIP-8 computed for the previous frame.

FEBEs are detected by extracting the 4-bit FEBE field from the path status byte

(G1). The legal range for the 4-bit field is between 0000 and 1000, representing

zero to eight errors. Any other value is interpreted as zero errors.

Path RDI alarm is detected by extracting bit 5 of the path status byte. The PRDI

signal is set high when bit 5 is set high for five/ten consecutive frames. PRDI is

set low when bit 5 is low for five/ten consecutive frames. Auxiliary RDI alarm is

detected by extracting bit 6 of the path status byte. The Auxiliary RDI alarm is

indicated when bit 6 is set high for five/ten consecutive frames. The Auxiliary RDI

alarm is removed when bit 6 is low for five/ten consecutive frames. The

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