PM5357 datasheet(71/432 Pages) PMC

71 / 432 page

PRODUCTION

S/UNI-622-POS

PMC-Sierra, Inc.

PM5357

S/UNI-622-POS

DATASHEET

PMC-1980911

ISSUE 5

SATURN USER NETWORK INTERFACE (622-POS)

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE

Descramble

The Descramble Block utilizes a frame synchronous descrambler to process the

receive stream. The generating polynomial is x7 + x6 + 1 and the sequence

length is 127. Details of the descrambling operation are provided in the

references. Note that the framing bytes (A1 and A2) and the trace/growth bytes

(J0/Z0) are not descrambled. A register bit is provided to disable the

descrambling operation.

Data Link Extract

The Data Link Extract Block extracts the section data communication channel

(bytes D1, D2, and D3) from the STS-12c/STM-4-4c stream. The extracted

bytes are serialized and output on signal RSD at a nominal 192 kbit/s rate.

Timing for downstream processing of the data communication channel is

provided by the RSDCLK signal that is also output by the Data Link Extract

Block. RSDCLK is derived from a 216 kHz clock that is gapped to yield an

average frequency of 192 kHz. RSD is updated with timing aligned to RSDCLK.

Error Monitor

The Error Monitor Block calculates the received section BIP-8 error detection

code (B1) based on the scrambled data of the complete STS-12c/STM-4-4c

frame. The section BIP-8 code is based on a bit interleaved parity calculation

using even parity. The calculated BIP-8 code is compared with the BIP-8 code

extracted from the B1 byte of the following frame. Differences indicate that a

section level bit error has occurred. Up to 64000 (8 x 8000) bit errors can be

detected per second. The Error Monitor Block accumulates these section level

bit errors in a 16-bit saturating counter that can be read via the microprocessor

interface. Circuitry is provided to latch this counter so that its value can be read

while simultaneously resetting the internal counter to 0 or 1, if appropriate, so

that a new period of accumulation can begin without loss of any events. It is

intended that this counter be polled at least once per second so as not to miss bit

error events.

Loss of Signal

The Loss of Signal Block monitors the scrambled data of the receive stream for

the absence of 1's or 0’s. When 20 ± 3 µs of all zeros patterns or all ones

patterns are detected, a loss of signal (LOS) is declared. Loss of signal is

cleared when two valid framing words are detected and during the intervening

time, no loss of signal condition is detected. The LOS signal is optionally

reported on the RALRM output pin when enabled by the LOSEN Receive Alarm

Control Register bit.

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