PM5357 datasheet(91/432 Pages) PMC

91 / 432 page

PRODUCTION

S/UNI-622-POS

PMC-Sierra, Inc.

PM5357

S/UNI-622-POS

DATASHEET

PMC-1980911

ISSUE 5

SATURN USER NETWORK INTERFACE (622-POS)

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE

byte position, and the pointer value is incremented by one. Positive pointer

movements may be inserted once per frame for diagnostic purposes.

(4) Negative pointer movements may be generated using a bit in an internal

the pointer word. The SPE is inserted during the negative stuff opportunity byte

position, the H3 byte, and the pointer value is decremented by one. Negative

pointer movements may be inserted once per frame for diagnostic purposes.

The pointer value is used to insert the path overhead into the transmit stream.

The current pointer value may be read via internal registers.

BIP-8 Calculate

The BIP-8 Calculate Block performs a path bit interleaved parity calculation on

the SPE of the transmit stream. Details are provided in the references. The

resulting parity byte is inserted in the path BIP-8 (B3) byte position of the

subsequent frame. BIP-8 errors may be continuously inserted under register

control for diagnostic purposes.

FEBE Calculate

The FEBE Calculate Block accumulates far end block errors on a per frame

basis, and inserts the accumulated value (up to maximum value of eight) in the

FEBE bit positions of the path status (G1) byte. The FEBE information is derived

from path BIP-8 errors detected by the receive path overhead processor, RPOP.

Far end block errors may be inserted under register control for diagnostic

purposes.

10.12 Transmit ATM Cell Processor (TXCP)

The Transmit ATM Cell Processor (TXCP) provides rate adaptation via

idle/unassigned cell insertion, provides HCS generation and insertion, and

performs ATM cell scrambling. The TXCP contains a four cell transmit FIFO. An

idle or unassigned cell is transmitted if a complete ATM cell has not been written

into the FIFO.

Transmit FIFO

The Transmit FIFO is responsible for holding cell provided through the Transmit

System Interface until they are transmitted. The transmit FIFO can

accommodate a maximum of 4 cells. The cells are written in with a single 16 bit

data bus running off TFCLK and are read out using the SONET/SDH clock.

Internal read and write pointers track the cells and indicate the fill status of the

PM5357 Datasheet(PDF) 91 Page - PMC-Sierra, Inc

PM5357 Datasheet(HTML) 91 Page - PMC-Sierra, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL