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440EPX Datasheet(PDF) 64 Page - Applied Micro Circuits Corporation

Part # 440EPX
Description  PowerPC 440EPx Embedded Processor
PDF  94 Pages
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Manufacturer  AMCC [Applied Micro Circuits Corporation]
Direct Link  http://www.amcc.com
Logo AMCC - Applied Micro Circuits Corporation

440EPX Datasheet(HTML) 64 Page - Applied Micro Circuits Corporation

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440EPx – PPC440EPx Embedded Processor
Preliminary Data Sheet
64
AMCC Proprietary
Revision 1.26 – October 15, 2007
System Interface
SysClk
Main system clock input.
I
3.3V tolerant
2.5V CMOS
1
SysErr
Set to 1 when a machine check is generated.
O
3.3V tolerant
2.5V CMOS
SysReset
Main system reset. External logic can drive this bidirectional pin
low (minimum of 16 cycles) to initiate a system reset. A system
reset can also be initiated by software. Implemented as an open-
drain output (two states; 0 or open circuit).
I/O
3.3V tolerant
2.5V CMOS
1, 2
Halt
Halt from external debugger.
I
3.3V LVTTL
Rcvr w/pull-up
TmrClk
Processor timer external input clock.
I
3.3V LVTTL
GPIO00:15
GPIO22:23
GPIO26:48
General purpose I/O. To access these functions, software must
set DCR register bits.
I/O
3.3V LVTTL
1
GPIO16:21
GPIO24:25
General purpose I/O. To access these functions, software must
set DCR register bits.
I/O
3.3V tolerant
2.5V CMOS
1
GPIO49:63
General purpose I/O. To access these functions, software must
set DCR register bits.
I/O
3.3V tolerant
2.5V CMOS
TestEn
Test Enable.
Note: Do not connect for normal operation.
I
3.3V LVTTL
Rcvr w/pull-
down
RcvrInh
Receiver Inhibit. Active only when TestEn is active. Used for
manufacturing test only.
I
3.3V LVTTL
1
ModeCtrl
Mode Control. Active only when TestEn is active. Used for
manufacturing test only.
I
3.3V tolerant
2.5V CMOS
Rcvr
1
LeakTest
LeakTest2
Leakage Test. Active only when TestEn is active. Used for
manufacturing test only.
I
3.3V LVTTL
w/pull-up
1
RefEn
Reference Enable. Active only when TestEn is active. Used for
manufacturing test only.
I
3.3V LVTTL
1
DrvrInh1:2
Driver Inhibit. Active only when TestEn is active. Used for
manufacturing test only. Tie up as specified in Note 2 for normal
operation.
I
3.3V LVTTL
w/pull-up
1
TherMonA:B
On-chip PNP thermal monitor transistor.
A is the emitter and B is the base. The collector is grounded.
I
Thermal
monitor
5
PSROOut
Module characterization and screening. Use for test purposes
only. Tie down as specified in Note 3 for normal operation.
O
Perf screen ring
oscillator
1, 3
Table 8. Signal Functional Description (Sheet 8 of 9)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3k
Ω to OV
DD (EOVDD for Ethernet)
3. Must pull down (recommended value is 1k
Ω)
4. If not used, must pull up (recommended value is 3k
Ω to OV
DD (EOVDD for Ethernet)
5. If not used, must pull down (recommended value is 1k
Ω)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Description
I/O
Type
Notes



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