440EPX datasheet(76/94 Pages) AMCC

76 / 94 page

440EPx – PPC440EPx Embedded Processor

Preliminary Data Sheet

AMCC Proprietary

Revision 1.26 – October 15, 2007

I/O Specifications

Table 19. Peripheral Interface Clock Timings (Sheet 1 of 3)

Parameter

Min

Max

Units

Notes

PCIClk frequency (asynchronous mode)

–

66.66

MHz

PCIClk period (asynchronous mode)

–

PCIClk high time

40% of nominal period

60% of nominal period

PCIClk low time

40% of nominal period

60% of nominal period

GMCMDClk frequency

–

2.5

MHz

GMCMDClk period

400

–

GMCMDClk high time

160

–

GMCMDClk low time

160

–

GMCTxClk frequency MII

2.5

MHz

GMCTxClk period MII

400

GMCTxClk high time

35% of nominal period

–

GMCTxClk low time

35% of nominal period

–

GMCRxClk frequency MII

2.5

MHz

GMCRxClk period MII

400

GMCRxClk high time

35% of nominal period

–

GMCRxClk low time

35% of nominal period

–

GMCRefClk frequency

–

125

MHz

GMCRefClk period

–

MHz

GMCRefClk high time

40% of nominal period

60% of nominal period

GMCRefClk low time

40% of nominal period

60% of nominal period

GMCRefClk Edge Stability (cycle-to-cycle jitter)

–

+0.15

GMCRefClk Slew Rate

–

V/ns

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