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TMP88CS38FG Datasheet(PDF) 41 Page - Toshiba Semiconductor |
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TMP88CS38FG Datasheet(HTML) 41 Page - Toshiba Semiconductor |
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41 / 226 page ![]() TMP88CS38/CM38A/CP38A 2007-09-12 88CS38-41 Example 2: Replacing data 55H at 0C020H with 33H Using the initial routine program, which is executed right after reset, read the start address of the data to be replaced and the patch data from the external memory. Set CMx (x: 0 to 3) to “1” to change the correction mode to the data replacement mode. Specify the start address (0C020H) of the data to be replaced as the corrective ROM address. Then, specify the new three-byte data (33H for 0C020H, CCH for 0C021H, and C3H for 0C022H) as the patch data. Note 1: Corrective address must be assigned to constant data area on the data replacement mode. (Ope-code and ope-rand can’t be replaced by ROM correction circuit.) Note 2: Instructions which includes “(HL +)” or “(−HL) ” operation can't be replaced by ROM corrective circuit on the data replacement mode. DBR SFR RAM 00000H 0003FH 00040H 0083FH 00F80H 00FFFH 04000H FFFFFH ROM 0C021H 55H AAH A5H 0C020H 0C022H CCH 33H 3CH Replacement data 1. At HL = 0C020H, Executing LD A, (HL) loads 33H in A. (Data replacement) 2. At HL = 0C021H, Executing LD A, (HL) loads AAH in A. (No data replacement) 3. At HL = 0C020H, Executing LD WA, (HL) loads CC33H in WA. (Data replacement) 4. At HL = 0C020H, Executing LD IX, (HL) loads CCC33H in IX. (Data replacement) |
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