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TMP88CS38FG Datasheet(PDF) 76 Page - Toshiba Semiconductor |
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TMP88CS38FG Datasheet(HTML) 76 Page - Toshiba Semiconductor |
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76 / 226 page ![]() TMP88CS38/CM38A/CP38A 2007-09-12 88CS38-76 2.7.3 Function The timer/counter 3 has three operating modes: timer, event counter, and capture mode. When it is used in the capture mode, the noise rejection time of TC3 pin input can be set by remote control receive control register. (1) Timer mode In this mode, the internal clock is used for counting up. The contents of TC3DRA are compared with the contents of up counter. If a match is found, a timer/counter 3 interrupt (INTTC3) is generated, and the up counter is cleared. The current contents of up counter are loaded into TC3DRB by setting ACAP (Bit6 in TC3CR) to “1” (Auto-capture function). The contents of up counter can be easily confirmed by executing the read instruction (RD instruction) of TC3DRB. Loading the contents of up counter is not synchronized with counting up. The contents of over flow (FFH) and 00H can not be loaded correctly. It is necessary to consider the count cycle. Table 2.7.1 Source Clock (Internal clock) for Timer/Counter 3 (Example: at fc = 16.0 MHz) NORMAL, IDLE Mode DV1CK = 0 DV1CK = 1 TC3CK Resolution [ μs] Maximum Setting Time [ms] Resolution [ μs] Maximum Setting Time [ms] 000 512 130.6 1024 261.1 001 256 65.3 512 130.6 010 128 32.6 256 65.3 011 64 16.3 128 32.6 100 32 8.2 64 16.3 101 16 4.1 32 8.2 110 8 2.0 16 4.1 FE FF 00 01 FE FF/00 01 Counter Clock TC3DRB |
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