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TMP88CS38FG Datasheet(PDF) 67 Page - Toshiba Semiconductor |
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TMP88CS38FG Datasheet(HTML) 67 Page - Toshiba Semiconductor |
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67 / 226 page ![]() TMP88CS38/CM38A/CP38A 2007-09-12 88CS38-67 Note 1: Be sure to read the captured value from TC1DRB before the next trigger edge is detected. If fail to read it, it becomes undefined. It is recommended that a 16-bit access instruction be used to read from TC1DRB. Note 2: If either the falling or rising edge is used in capturing values, the counter stops at “1” after a value has been captured until the next edge is detected. So, the value captured next will become “1” larger than the value captured right after capturing starts. Note 3: In the Pulse width measurement mode, the capture value of the first time after the timer starts might not be a correct value. Thus, execute the dummy read once. Example: Duty measurement (Resolution fc/2 7 [Hz] DV1CK = 0) CLR (INTTC1SW). 0 ; INTTC1 service switch initial setting: Clears bit0 of INTTC1SW. This bit is inverted by CPL instruction before INTTC1 is generated. LD (TC1CR), 00000110B ; Sets the TC1 mode and source clock DI SET (EIRL). 4 ; Enables INTTC1 EI LD (TC1CR), 00100110B ; Starts TC1 with an external trigger at MCAP1 = 0 PINTTC1: CPL (INTTC1SW). 0 ; Complements INTTC1 service switch JRS F, SINTTC1 LD WA, (TC1DRBL) ; Reads TC1DRB (“H” level pulse width) Lower address in TC1DRBL: TC1DRB LD (HPULSE), WA RETI SINTTC1: LD LD WA, (TC1DRBL) (WIDTH), WA ; Reads TC1DRB (Period) RETI ; Duty calculation VINTTC1: DW PINTTC1 ; Sets INTTC1 HPULSE WIDTH TC1 pin INTTC1 INTTC1SW |
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