Data Sheet Rev. F, February 10, 2025 | Subject to change without notice

7 of 43

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ACT43750

RF POL Drain-Switch Driver / Gate-bias Regulator

®

ABSOLUTE MAXIMUM RATINGS (NOTE 1) (NOTE 2)

Parameter

Value

Unit

V50

-0.3 to +65

V

VCSPA, VCSCAL (Referenced to V50)

-5 to +0.3

V

VBT50 (Referenced to VD)

-0.3 to +10

V

VD

-0.3 to (V50 + 0.3)

V

V12

-0.3 to +15.0

V

VSDA, VSCL, VSCL50, VSDA50, VENCAL, VENG, VPG, VXINT, VENTX, VSYNC, VNTC, VREFIN, VCONF

‒0.3 to +6.0

V

VG

‒10.0 to +0.3

V

VGSW

– with respect to VG

‒0.3 to (|V12 ‒ VPGND| +

0.3)

V

VAGND to VPGND

‒0.3 to +0.3

Junction to Case Thermal Resistance (Note 3)

6.03

oC/W

Junction to Ambient Thermal Resistance (Note 3)

24.37

oC/W

Operating Junction temperature

-40 to 125

oC

Storage temperature

-55 to 150

oC

V_ESD_HBM (All pins) (Human body model per JEDEC JS-001)

2500

V

V_ESD_CDM (All pins) (Charged device model JEDEC JS-002)

1250

V

MSL

MSL3

Note 1: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for extended periods may

affect device reliability.

Note 2: All voltages with respect to PGND unless otherwise noted.

Note 3: Measured on Qorvo Evaluation board, which has 1oz copper and 163.5mm x 229mm board area.